MCP4017 datasheet(35/66 Pages) MICROCHIP

35 / 66 page

DS22147A-page 35

MCP4017/18/19

5.2.5

STOP BIT

The Stop bit (see Figure 5-6) Indicates the end of the

I2C Data Transfer Sequence. The Stop bit is defined as

the SDA signal rising when the SCL signal is “High”.

A Stop bit resets the I2C interface of the other devices.

FIGURE 5-6:

Stop Condition Receive or

Transmit Mode.

5.2.6

CLOCK STRETCHING

“Clock Stretching” is something that the Secondary

Device can do, to allow additional time to “respond” to

the “data” that has been received.

The MCP4017/18/19 will not strech the clock signal

(SCL) since memory read accesses occur fast enough.

5.2.7

ABORTING A TRANSMISSION

If any part of the I2C transmission does not meet the

command format, it is aborted. This can be intentionally

accomplished with a START or STOP condition. This is

done so that noisy transmissions (usually an extra

START or STOP condition) are aborted before they

corrupt the device.

5.2.8

IGNORING AN I2C TRANSMISSION

AND “FALLING OFF” THE BUS

The MCP4017/18/19 expects to receive entire, valid

I2C commands and will assume any command not

defined as a valid command is due to a bus corruption

and will enter a passive high condition on the SDA

signal. All signals will be ignored until the next valid

START condition and CONTROL BYTE are received.

FIGURE 5-7:

Typical 16-bit I2C Waveform Format.

FIGURE 5-8:

I2C Data States and Bit Sequence.

SCL

SDA A / A

1st

SDA

SCL

2nd 3rd 4th 5th 6th 7th 8th

A/A

Bit Bit Bit Bit Bit Bit Bit Bit

1st 2nd 3rd 4th 5th 6th 7th 8th A/A

Bit Bit Bit Bit Bit Bit Bit Bit

SCL

SDA

START

Condition

STOP

Condition

Data allowed

to change

Data or

A valid

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