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PIC18F8722-E/PTQTP Datasheet(PDF) 61 Page - Microchip Technology |
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PIC18F8722-E/PTQTP Datasheet(HTML) 61 Page - Microchip Technology |
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61 / 446 page  © 2008 Microchip Technology Inc. DS39646C-page 59 PIC18F8722 FAMILY ADRESH 6X27 6X22 8X27 8X22 xxxx xxxx uuuu uuuu uuuu uuuu ADRESL 6X27 6X22 8X27 8X22 xxxx xxxx uuuu uuuu uuuu uuuu ADCON0 6X27 6X22 8X27 8X22 --00 0000 --00 0000 --uu uuuu ADCON1 6X27 6X22 8X27 8X22 --00 0000 --00 0000 --uu uuuu ADCON2 6X27 6X22 8X27 8X22 0-00 0000 0-00 0000 u-uu uuuu CCPR1H 6X27 6X22 8X27 8X22 xxxx xxxx uuuu uuuu uuuu uuuu CCPR1L 6X27 6X22 8X27 8X22 xxxx xxxx uuuu uuuu uuuu uuuu CCP1CON 6X27 6X22 8X27 8X22 0000 0000 0000 0000 uuuu uuuu CCPR2H 6X27 6X22 8X27 8X22 xxxx xxxx uuuu uuuu uuuu uuuu CCPR2L 6X27 6X22 8X27 8X22 xxxx xxxx uuuu uuuu uuuu uuuu CCP2CON 6X27 6X22 8X27 8X22 0000 0000 0000 0000 uuuu uuuu CCPR3H 6X27 6X22 8X27 8X22 xxxx xxxx uuuu uuuu uuuu uuuu CCPR3L 6X27 6X22 8X27 8X22 xxxx xxxx uuuu uuuu uuuu uuuu CCP3CON 6X27 6X22 8X27 8X22 0000 0000 0000 0000 uuuu uuuu ECCP1AS 6X27 6X22 8X27 8X22 0000 0000 0000 0000 uuuu uuuu CVRCON 6X27 6X22 8X27 8X22 0000 0000 0000 0000 uuuu uuuu CMCON 6X27 6X22 8X27 8X22 0000 0111 0000 0111 uuuu uuuu TMR3H 6X27 6X22 8X27 8X22 xxxx xxxx uuuu uuuu uuuu uuuu TMR3L 6X27 6X22 8X27 8X22 xxxx xxxx uuuu uuuu uuuu uuuu T3CON 6X27 6X22 8X27 8X22 0000 0000 uuuu uuuu uuuu uuuu PSPCON 6X27 6X22 8X27 8X22 0000 ---- 0000 ---- uuuu ---- SPBRG1 6X27 6X22 8X27 8X22 0000 0000 0000 0000 uuuu uuuu RCREG1 6X27 6X22 8X27 8X22 0000 0000 0000 0000 uuuu uuuu TXREG1 6X27 6X22 8X27 8X22 0000 0000 0000 0000 uuuu uuuu TXSTA1 6X27 6X22 8X27 8X22 0000 0010 0000 0010 uuuu uuuu RCSTA1 6X27 6X22 8X27 8X22 0000 000x 0000 000x uuuu uuuu EEADRH 6X27 6X22 8X27 8X22 ---- --00 ---- --00 ---- --uu EEADR 6X27 6X22 8X27 8X22 0000 0000 0000 0000 uuuu uuuu EEDATA 6X27 6X22 8X27 8X22 0000 0000 0000 0000 uuuu uuuu EECON2 6X27 6X22 8X27 8X22 0000 0000 0000 0000 0000 0000 EECON1 6X27 6X22 8X27 8X22 xx-0 x000 uu-0 u000 uu-u uuuu TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Resets, WDT Reset, RESET Instruction, Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition. Shaded cells indicate conditions do not apply for the designated device. Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 4: See Table 4-3 for Reset value for specific condition. 5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as PORTA pins, they are disabled and read ‘0’. |
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