| Electronic Components Datasheet Search |
|
PIC18F87J10 Datasheet(PDF) 21 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC18F87J10 Datasheet(HTML) 21 Page - Microchip Technology |
|
21 / 410 page ![]() © 2009 Microchip Technology Inc. DS39663F-page 19 PIC18F87J10 FAMILY PORTC is a bidirectional I/O port. RC0/T1OSO/T13CKI RC0 T1OSO T13CKI 36 I/O O I ST — ST Digital I/O. Timer1 oscillator output. Timer1/Timer3 external clock input. RC1/T1OSI/ECCP2/P2A RC1 T1OSI ECCP2(2) P2A(2) 35 I/O I I/O O ST CMOS ST — Digital I/O. Timer1 oscillator input. Capture 2 input/Compare 2 output/PWM 2 output. ECCP2 PWM output A. RC2/ECCP1/P1A RC2 ECCP1 P1A 43 I/O I/O O ST ST — Digital I/O. Capture 1 input/Compare 1 output/PWM 1 output. ECCP1 PWM output A. RC3/SCK1/SCL1 RC3 SCK1 SCL1 44 I/O I/O I/O ST ST I2C/SMB Digital I/O. Synchronous serial clock input/output for SPI mode. Synchronous serial clock input/output for I2C™ mode. RC4/SDI1/SDA1 RC4 SDI1 SDA1 45 I/O I I/O ST ST I2C/SMB Digital I/O. SPI data in. I2C data I/O. RC5/SDO1 RC5 SDO1 46 I/O O ST — Digital I/O. SPI data out. RC6/TX1/CK1 RC6 TX1 CK1 37 I/O O I/O ST — ST Digital I/O. EUSART1 asynchronous transmit. EUSART1 synchronous clock (see related RX1/DT1). RC7/RX1/DT1 RC7 RX1 DT1 38 I/O I I/O ST ST ST Digital I/O. EUSART1 asynchronous receive. EUSART1 synchronous data (see related TX1/CK1). TABLE 1-4: PIC18F8XJ10/8XJ15 PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Name Pin Number Pin Type Buffer Type Description TQFP Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output ST = Schmitt Trigger input with CMOS levels Analog = Analog input I = Input O = Output P = Power OD = Open-Drain (no P diode to VDD) I2C/SMB = I2C™/SMBus input buffer Note 1: Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared (Extended Microcontroller mode). 2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set). 3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set). 4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode). 5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared). |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |