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PIC18F44J10 Datasheet(PDF) 206 Page - Microchip Technology

Part # PIC18F44J10
Description  28/40/44-Pin High-Performance, RISC Microcontrollers
PDF  368 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F44J10 Datasheet(HTML) 206 Page - Microchip Technology

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PIC18F45J10 FAMILY
DS39682E-page 204
© 2009 Microchip Technology Inc.
FIGURE 17-4:
ASYNCHRONOUS TRANSMISSION
FIGURE 17-5:
ASYNCHRONOUS TRANSMISSION (BACK TO BACK)
TABLE 17-5:
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
47
PIR1
PSPIF(1)
ADIF
RCIF
TXIF
SSP1IF
CCP1IF
TMR2IF
TMR1IF
49
PIE1
PSPIE(1)
ADIE
RCIE
TXIE
SSP1IE
CCP1IE
TMR2IE
TMR1IE
49
IPR1
PSPIP(1)
ADIP
RCIP
TXIP
SSP1IP
CCP1IP
TMR2IP
TMR1IP
49
RCSTA
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
49
TXREG
EUSART Transmit Register
49
TXSTA
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
49
BAUDCON
ABDOVF
RCIDL
—
SCKP
BRG16
—
WUE
ABDEN
49
SPBRGH
EUSART Baud Rate Generator Register High Byte
49
SPBRG
EUSART Baud Rate Generator Register Low Byte
49
Legend:
— = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Note 1:
These bits are not implemented on 28-pin devices and should be read as ‘0’.
Word 1
Word 1
Transmit Shift Reg
Start bit
bit 0
bit 1
bit 7/8
Write to TXREG
BRG Output
(Shift Clock)
TX (pin)
TXIF bit
(Transmit Buffer
Reg. Empty Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
1 TCY
Stop bit
Word 1
Transmit Shift Reg.
Write to TXREG
BRG Output
(Shift Clock)
TX (pin)
TXIF bit
(Interrupt Reg. Flag)
TRMT bit
(Transmit Shift
Reg. Empty Flag)
Word 1
Word 2
Word 1
Word 2
Stop bit
Start bit
Transmit Shift Reg.
Word 1
Word 2
bit 0
bit 1
bit 7/8
bit 0
Note:
This timing diagram shows two consecutive transmissions.
1 TCY
1 TCY
Start bit



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