PIC18F44J10-ISLASHSOSQTP datasheet(290/368 Pages) MICROCHIP

290 / 368 page

PIC18F45J10 FAMILY

DS39682E-page 288

TBLWT

Table Write

Syntax:

TBLWT ( *; *+; *-; +*)

Operands:

None

Operation:

if TBLWT *,

(TABLAT)

→ Holding Register,

TBLPTR – No Change;

if TBLWT *+,

(TABLAT)

→ Holding Register,

(TBLPTR) + 1

→ TBLPTR;

if TBLWT *-,

(TABLAT)

→ Holding Register,

(TBLPTR) – 1

→ TBLPTR;

if TBLWT +*,

(TBLPTR) + 1

→ TBLPTR,

(TABLAT)

→ Holding Register

Status Affected:

None

Encoding:

0000

11nn

nn=0 *

=1 *+

=2 *-

=3 +*

Description:

This instruction uses the 3 LSBs of

TBLPTR to determine which of the

8 holding registers the TABLAT is written

to. The holding registers are used to

program the contents of Program

Memory (P.M.). (Refer to Section 7.0

“Flash Program Memory”

for additional

details on programming Flash memory.)

The TBLPTR (a 21-bit pointer) points to

each byte in the program memory.

TBLPTR has a 2-MByte address range.

The LSb of the TBLPTR selects which

byte of the program memory location to

access.

TBLPTR[0] = 0: Least Significant

Byte of Program

Memory Word

TBLPTR[0] = 1: Most Significant

Byte of Program

Memory Word

The TBLWT instruction can modify the

value of TBLPTR as follows:

• no change

• post-increment

• post-decrement

• pre-increment

Words:

Cycles:

Q Cycle Activity:

Decode

operation

(Read

TABLAT)

operation

(Write to

Holding

TBLWT

Table Write (Continued)

Example 1:

TBLWT *+;

Before Instruction

TABLAT

55h

TBLPTR

00A356h

HOLDING REGISTER

(00A356h)

FFh

After Instructions (table write completion)

TABLAT

55h

TBLPTR

00A357h

HOLDING REGISTER

(00A356h)

55h

Example 2:

TBLWT +*;

Before Instruction

TABLAT

34h

TBLPTR

01389Ah

HOLDING REGISTER

(01389Ah)

FFh

HOLDING REGISTER

(01389Bh)

FFh

After Instruction (table write completion)

TABLAT

34h

TBLPTR

01389Bh

HOLDING REGISTER

(01389Ah)

FFh

HOLDING REGISTER

(01389Bh)

34h

PIC18F44J10-I/SOSQTP Datasheet(PDF) 290 Page - Microchip Technology

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