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PIC18F44J10-I/SOSQTP Datasheet(PDF) 292 Page - Microchip Technology

Part # PIC18F44J10-I/SOSQTP
Description  28/40/44-Pin High-Performance, RISC Microcontrollers
PDF  368 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F44J10-I/SOSQTP Datasheet(HTML) 292 Page - Microchip Technology

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PIC18F45J10 FAMILY
DS39682E-page 290
© 2009 Microchip Technology Inc.
XORWF
Exclusive OR W with f
Syntax:
XORWF
f {,d {,a}}
Operands:
0
≤ f ≤ 255
d
∈ [0,1]
a
∈ [0,1]
Operation:
(W) .XOR. (f)
→ dest
Status Affected:
N, Z
Encoding:
0001
10da
ffff
ffff
Description:
Exclusive OR the contents of W with
register ‘f’. If ‘d’ is ‘0’, the result is stored
in W. If ‘d’ is ‘1’, the result is stored back
in the register ‘f’ (default).
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f
≤ 95 (5Fh). See
Section 22.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode”
for details.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write to
destination
Example:
XORWF
REG, 1, 0
Before Instruction
REG
=
AFh
W=
B5h
After Instruction
REG
=
1Ah
W=
B5h



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