PIC18F2221 datasheet(127/402 Pages) MICROCHIP

127 / 402 page

DS39689F-page 127

PIC18F2221/2321/4221/4321 FAMILY

FIGURE 11-3:

PARALLEL SLAVE PORT WRITE WAVEFORMS

FIGURE 11-4:

PARALLEL SLAVE PORT READ WAVEFORMS

TABLE 11-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset

Values on

page

PORTD

RD7

RD6

RD5

RD4

RD3

RD2

RD1

RD0

LATD

PORTD Data Latch Register (Read and Write to Data Latch)

TRISD

PORTD Data Direction Register

PORTE

—

RE3

RE2

RE1

RE0

LATE

—

PORTE Data Latch Register

(Read and Write to Data Latch)

TRISE

IBF

OBF

IBOV

PSPMODE

—

TRISE2

TRISE1

TRISE0

INTCON

GIE/GIEH PEIE/GIEL

TMR0IF

INT0IE

RBIE

TMR0IF

INT0IF

RBIF

PIR1

PSPIF(1)

ADIF

RCIF

TXIF

SSPIF

CCP1IF

TMR2IF

TMR1IF

PIE1

PSPIE(1)

ADIE

RCIE

TXIE

SSPIE

CCP1IE

TMR2IE

TMR1IE

IPR1

PSPIP(1)

ADIP

RCIP

TXIP

SSPIP

CCP1IP

TMR2IP

TMR1IP

ADCON1

—

VCFG1

VCFG0

PCFG3

PCFG2

PCFG1

PCFG0

Legend:

— = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.

Note 1:

These bits are unimplemented on 28-pin devices and read as ‘0’.

IBF

OBF

PSPIF

PORTD<7:0>

IBF

PSPIF

OBF

PORTD<7:0>

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