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AT90SCR100 Datasheet(PDF) 330 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 330 Page - ATMEL Corporation |
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330 / 433 page ![]() 330 TPR0327AY–SMS–30Jan09 AT90SCR100 Figure 23-2. Keyboard Input Circuitry 23.2.3 Power Reduction Mode Keyboard inputs allow wake up from power-down, power-save, Standby, Extended Standbay modes “Active Clock Domains and Wake-up Sources in the Different Sleep Modes.” on page 44. 23.3 Keyboard Register Description 23.3.1 KBFR - KeyBoard Flag Register • Bit 7- KBF7: Keyboard Flag for KbIN7 pin Set by hardware when the pin function KbIN7 (PA7) detects a programmed level. It generates a Keyboard interrupt request if the KBER.KBE7 bit is set. Writing a ‘0’ or a ‘1’ into this bit will erase all the bits (including this one) of the KBFR register • Bit 6 - KBF6: Keyboard Flag for KbIN6 pin Set by hardware when the pin function KbIN6 (PA6) detects a programmed level. It generates a Keyboard interrupt request if the KBER.KBE6 bit is set. Writing a ‘0’ or a ‘1’ into this bit will erase all the bits (including this one) of the KBFR register • Bit 5 - KBF5: Keyboard Flag for KbIN5 pin Set by hardware when the pin function KbIN5 (PA5) detects a programmed level. It generates a Keyboard interrupt request if the KBER.KBE5 bit is set. Writing a ‘0’ or a ‘1’ into this bit will erase all the bits (including this one) of the KBFR register • Bit 4 - KBF4: Keyboard Flag for KbIN4 pin Set by hardware when the pin function KbIN4 (PA4) detects a programmed level. It generates a Keyboard interrupt request if the KBER.KBE4 bit is set. Writing a ‘0’ or a ‘1’ into this bit will erase all the bits (including this one) of the KBFR register • Bit 3 - KBF3 : Keyboard Flag for KbIN3 pin Set by hardware when the pin function KbIN3 (PA3) detects a programmed level. It generates a Keyboard interrupt request if the KBER.KBE3 bit is set. KBLS.x KbIN x KBF.x KBE.x 0 1 Bit 7654 3 2 1 0 $008F KBF7 KBF6 KBF5 KBF4 KBF3 KBF2 KBF1 KBF0 KBFR Read/write R/W R/W R/W R/W R/W R/W R/W R/W Initial value 0000 0 0 0 0 0x00 |
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