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AT90SCR100 Datasheet(PDF) 360 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 360 Page - ATMEL Corporation |
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360 / 433 page ![]() 360 TPR0327AY–SMS–30Jan09 AT90SCR100 27.7 AT90SCR100 Boundary-scan Order Table 27-1 shows the Scan order between TDI and TDO when the Boundary-scan chain is selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned out. The scan order follows the pin-out order as far as possible. Therefore, the bits of Port A and Port K is scanned in the opposite bit order of the other ports. Exceptions from the rules are the Scan chains for the analog circuits, which constitute the most significant bits of the scan chain regard- less of which physical pin they are connected to. In Figure 27-3, PXn. Data corresponds to FF0, PXn. Control corresponds to FF1, PXn. Bit 4, 5, 6 and 7 of Port F is not in the scan chain, since these pins constitute the TAP pins when the JTAG is enabled. Table 27-1. AT90SCR100 Boundary-scan Order Bit Number Signal Name Module 68 PE0.Data Port E 67 PE0.Control 66 PE1.Data 65 PE1.Control 64 PE2.Data 63 PE2.Control 62 PE3.Data 61 PE3.Control 60 PE4.Data 59 PE4.Control 58 PE5.Data 57 PE5.Control 56 PE6.Data 55 PE6.Control 54 PE7.Data 53 PE7.Control |
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