AT90SCR100 datasheet(372/433 Pages) ATMEL

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372

TPR0327AY–SMS–30Jan09

AT90SCR100

28.7.8

EEPROM Write Prevents Writing to SPMCSR

Note that an EEPROM write operation will block all software programming to Flash. Reading the

Fuses and Lock bits from software will also be prevented during the EEPROM write operation. It

is recommended that the user checks the status bit (EEPE) in the EECR Register and verifies

that the bit is cleared before writing to the SPMCSR Register.

28.7.9

Reading the Fuse and Lock Bits from Software

It is possible to read both the Fuse and Lock bits from software. To read the Lock bits, load the

Z-pointer with 0x0001 and set the BLBSET and SPMEN bits in SPMCSR. When an (E)LPM

instruction is executed within three CPU cycles after the BLBSET and SPMEN bits are set in

SPMCSR, the value of the Lock bits will be loaded in the destination register. The BLBSET and

SPMEN bits will auto-clear upon completion of reading the Lock bits or if no (E)LPM instruction

is executed within three CPU cycles or no SPM instruction is executed within four CPU cycles.

When BLBSET and SPMEN are cleared, (E)LPM will work as described in the Instruction set

Manual.

The algorithm for reading the Fuse Low byte is similar to the one described above for reading

the Lock bits. To read the Fuse Low byte, load the Z-pointer with 0x0000 and set the BLBSET

and SPMEN bits in SPMCSR. When an (E)LPM instruction is executed within three cycles after

the BLBSET and SPMEN bits are set in the SPMCSR, the value of the Fuse Low byte (FLB) will

be loaded in the destination register as shown below. Refer to Table 29-5 on page 380 for a

detailed description and mapping of the Fuse Low byte.

Similarly, when reading the Fuse High byte, load 0x0003 in the Z-pointer. When an (E)LPM

instruction is executed within three cycles after the BLBSET and SPMEN bits are set in the

SPMCSR, the value of the Fuse High byte (FHB) will be loaded in the destination register as

shown below. Refer to Table 29-4 on page 379 for detailed description and mapping of the Fuse

High byte.

When reading the Extended Fuse byte, load 0x0002 in the Z-pointer. When an (E)LPM instruc-

tion is executed within three cycles after the BLBSET and SPMEN bits are set in the SPMCSR,

the value of the Extended Fuse byte (EFB) will be loaded in the destination register as shown

below. Refer to Table 29-3 on page 379 for detailed description and mapping of the Extended

Fuse byte.

Fuse and Lock bits that are programmed, will be read as zero. Fuse and Lock bits that are

unprogrammed, will be read as one.

Bit

7654

BLB12

BLB11

BLB02

BLB01

LB2

LB1

Bit

7654

FLB7

FLB6

FLB5

FLB4

FLB3

FLB2

FLB1

FLB0

Bit

7654

FHB7

FHB6

FHB5

FHB4

FHB3

FHB2

FHB1

FHB0

Bit

7654

-----

EFB2

EFB1

EFB0

AT90SCR100 Datasheet(PDF) 372 Page - ATMEL Corporation

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