ATmega169P datasheet(84/393 Pages) ATMEL

84 / 393 page

8018N–AVR–08/09

ATmega169P

• TDO, ADC6 – Port F, Bit 6

ADC6, Analog to Digital Converter, Channel 6.

TDO, JTAG Test Data Out: Serial output data from Instruction Register or Data Register. When

the JTAG interface is enabled, this pin can not be used as an I/O pin. In TAP states that shift out

data, the TDO pin drives actively. In other states the pin is pulled high.

• TMS, ADC5 – Port F, Bit 5

ADC5, Analog to Digital Converter, Channel 5.

TMS, JTAG Test mode Select: This pin is used for navigating through the TAP-controller state

machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin.

• TCK, ADC4 – Port F, Bit 4

ADC4, Analog to Digital Converter, Channel 4.

TCK, JTAG Test Clock: JTAG operation is synchronous to TCK. When the JTAG interface is

enabled, this pin can not be used as an I/O pin.

• ADC3 - ADC0 – Port F, Bit 3:0

Analog to Digital Converter, Channel 3-0.

Table 13-19. Overriding Signals for Alternate Functions in PF7:PF4

Signal

Name

PF7/ADC7/TDI

PF6/ADC6/TDO

PF5/ADC5/TMS

PF4/ADC4/TCK

PUOE

JTAGEN

PUOV

DDOE

JTAGEN

DDOV

SHIFT_IR + SHIFT_DR

PVOE

JTAGEN

PVOV

TDO

PTOE

–

DIEOE

JTAGEN

DIEOV

–

AIO

TDI

ADC7 INPUT

ADC6 INPUT

TMS

ADC5 INPUT

TCK

ADC4 INPUT

ATmega169P Datasheet(PDF) 84 Page - ATMEL Corporation

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