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ATmega328P Datasheet(PDF) 105 Page - ATMEL Corporation |
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ATmega328P Datasheet(HTML) 105 Page - ATMEL Corporation |
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105 / 448 page  105 8161D–AVR–10/09 ATmega48PA/88PA/168PA/328P Figure 14-10. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (f clk_I/O/8) Figure 14-11 shows the setting of OCF0A and the clearing of TCNT0 in CTC mode and fast PWM mode where OCR0A is TOP. Figure 14-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres- caler (f clk_I/O/8) OCFnx OCRnx TCNTn OCRnx Value OCRnx - 1 OCRnx OCRnx + 1 OCRnx + 2 clk I/O clk Tn (clk I/O/8) OCFnx OCRnx TCNTn (CTC) TOP TOP - 1 TOP BOTTOM BOTTOM + 1 clk I/O clk Tn (clk I/O/8) |
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