73S8024RN-ILSLASHF datasheet(15/27 Pages) TERIDIAN

15 / 27 page

DS_8024RN_020

73S8024RN Data Sheet

Rev. 1.8

11 Typical Application Schematic

SO28

See NOTE 4

VDD

CLKSTOP_from_uC

CRYSTAL

22pF

NDS & ISO7816=1uF, EMV=3.3uF

See NOTE 5

RSTIN_from_uC

CLKDIV2_from_uC

CLK track should be routed

far from RST, I/O, C4 and

C8.

NOTES:

1) VDD = 2.7V to 5.5V DC.

2) VPC = 4.75V(EMV, ISO)/4.85(NDS) to 5.5V DC

3) Required if external clock from uP is used.

4) Required if crystal is used.

Y1, C2 and C3 must be removed if external clock is used.

5) Optional. Can be left open.

6)Internal pull-up allows it to be left open if unused.

7) R1 and R3 are external resistors that adjust the VDD

fault voltage. Can be left open.

I/OUC_to/from_uC

Rext1

See NOTE 1

Card detection

switch is

normally closed

VPC

100nF

VDD

External_clock_from uC

100nF

22pF

AUX1UC_to.from_uC

See NOTE 5

10uF

AUX2UC_to/from_uC

See NOTE 3

See NOTE 2

CLKLVL_from_uC

VDD

Low ESR (<100mohms) C1

should be placed near the SC

connecter contact

CLKDIV1_from_uC

CMDVCC_from_uC

73S8024RN

CLKDIV1

CLKDIV2

5V3V_

GND

VPC

CLKSTOP

AUX2

CLKLVL

PRESB

PRES

I/O

AUX1

GND

CLK

RST

VCC

VDDF_ADJ

CMDVCC_

RSTIN

VDD

GND

OFF_

AUX2UC

AUX1UC

XTALOUT

XTALIN

I/OUC

5V/3V_select_from_uC

OFF_interrupt_to_uC

Rext2

- OR -

20K

See note 7

Smart Card Connector

See NOTE 6

VDD

Figure 8: 73S8024RN – Typical Application Schematic

73S8024RN-IL/F Datasheet(PDF) 15 Page - Teridian Semiconductor Corporation

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