ST7565R datasheet(21/72 Pages) SITRONIX

21 / 72 page

ST7565R

Ver 1.7c

21/72

2009/09/14

Pin Name

I/O

Function

No. of Pins

CLS

Selection pin to enable or disable the internal display clock oscillator circuit.

CLS = “H” : use internal oscillator circuit .

CLS = “L” : use external clock input (internal oscillator is disabled).

When CLS = “L”, input the external display clock through the CL terminal.

I/O

This is the display clock input terminal

The following is true depending on the CLS status.

CLS

“H”

“L”

Output

Input

“H”

“L”

Input

This is the liquid crystal alternating current signal terminal.

/DOF

This is the LCD blanking control terminal.

IRS

This terminal selects the resistors for the V0 voltage level adjustment.

IRS = “H”: Use the internal resistors

IRS = “L”: Do not use the internal resistors. The V0 voltage level is

regulated by an external resistive voltage divider attached to the VR terminal

/HPM

This is the power control terminal for the power supply circuit for liquid crystal drive.

/HPM = “H”: Normal mode

/HPM = “L”: High power mode (suggested)

SEL3

SEL2

SEL1

These pins are DUTY selection.

SEL 3, 2, 1

DUTY

BIAS

0, 0, 0

1/65

1/9 or 1/7

0, 0, 1

1/49

1/8 or 1/6

0, 1, 0

1/33

1/6 or 1/5

0, 1, 1

1/55

1/8 or 1/6

1, 0, 0

1/53

1/8 or 1/6

1, X, X

-----

TEST0 ~ 7

These are terminals for IC testing.

TEST0 ~ 6: left them open.

TEST7 must connected to VDD

ST7565R Datasheet(PDF) 21 Page - Sitronix Technology Co., Ltd.

ST7565R Datasheet(HTML) 21 Page - Sitronix Technology Co., Ltd.

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