ST7565V datasheet(21/72 Pages) SITRONIX

21 / 72 page

ST7565V

Ver 1.5b

21/72

2009/09/14

Pin Name

I/O

Function

No. of Pins

CLS

Terminal to select whether or enable or disable the display clock internal oscillator

circuit.

CLS = “H” : used Internal oscillator circuit .

CLS = “L” : used external clock input .(internal oscillator is disable)

When CLS = “L”, input the display clock through the CL terminal.

M/S

This terminal selects the master/slave operation for the ST7565V Series chips.

Master operation outputs the timing signals that are required for the LCD display, while slave

operation input the timing signals required for the liquid crystal display,

Synchronizing the liquid crystal display system.

M/S = “H” Master operation

M/S = “L” Slave operation

M/S CLS

Oscillator

Circuit

Power

Supply

Circuit

DOF

“H”

“L”

Enabled

Disabled

Enabled

Output

Input

Output

“L”

“H”

“L”

Disabled

Input

I/O

This is the display clock input terminal

The following is true depending on the M/S and CLS status.

M/S

CLS

“H”

“L”

Output

Input

“L”

“H”

“L”

Input

This is the liquid crystal alternating current signal terminal.

/DOF

This is the LCD blanking control terminal.

IRS

This terminal selects the resistors for the V5 voltage level adjustment.

IRS = “H”: Use the internal resistors

IRS = “L”: Do not use the internal resistors. The V5 voltage level is

regulated by an external resistive voltage divider attached to the VR terminal

/HPM

This is the power control terminal for the power supply circuit for liquid crystal drive.

/HPM = “H”: Normal mode

/HPM = “L”: High power mode

SEL3

SEL2

SEL1

These pins are DUTY selection.

SEL 3 , 2 , 1

DUTY

BIAS

0 , 0 , 0

1/65

1/9 or 1/7

0 , 0 , 1

1/49

1/8 or 1/6

0 , 1 , 0

1/33

1/6 or 1/5

0 , 1 , 1

1/55

1/8 or 1/6

1 , 0 , 0

1/53

1/8 or 1/6

1, X , X

-----

TEST0 ~ 6

These are terminals for IC testing.

They are set to open.

ST7565V Datasheet(PDF) 21 Page - Sitronix Technology Co., Ltd.

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