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ADUC7122 Datasheet(PDF) 21 Page - Analog Devices |
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ADUC7122 Datasheet(HTML) 21 Page - Analog Devices |
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21 / 92 page ![]() Preliminary Technical Data ADuC7122 Rev. PrA | Page 21 of 92 Figure 11. Memory Mapped Registers COMPLETE MMR LISTING Note that the Access Type column corresponds to the access time reading or writing an MMR. It depends on the AMBA bus used to access the peripheral. The processor has two AMBA buses: the AHB (advanced high performance bus) used for system modules and the APB (advanced Peripheral bus) used for lower performance peripherals. Table 10. IRQ Base Address = 0xFFFF0000 Address Name Byte Access Type Cycle 0x0000 IRQSTA 4 R 1 0x0004 IRQSIG 4 R 1 0x0008 IRQEN 4 R/W 1 0x000C IRQCLR 4 W 1 0x0010 SWICFG 4 W 1 0x0014 IRQBASE 4 R/W 1 0x001C IRQVEC 4 R 1 0x0020 IRQP0 4 R/W 1 0x0024 IRQP1 4 R/W 1 0x0028 IRQP2 4 R/W 1 0x002C IRQP3 4 R/W 1 0x0030 IRQCONN 1 R/W 1 0x0034 IRQCONE 1 R/W 1 0x0038 IRQCLRE 1 W 1 0x003C IRQSTAN 1 R/W 0x0100 FIQSTA 4 R 1 0x0104 FIQSIG 4 R 1 0x0108 FIQEN 4 R/W 1 0x010C FIQCLR 4 W 1 0x011C FIQVEC 4 R 1 0x013C FIQSTAN 1 R/W 1 Table 11. System Control Base Address = 0xFFFF0200 Address Name Byte Access Type Cycle 0x0220 REMAP 1 R/W 1 0x0230 RSTSTA 1 R 1 0x0234 RSTCLR 1 W 1 |
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