DSPIC33FJ32GS608 datasheet(219/416 Pages) MICROCHIP

219 / 416 page

 2009 Microchip Technology Inc.

Preliminary

DS70591B-page 219

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610

14.0 INPUT CAPTURE

The input capture module is useful in applications

requiring frequency (period) and pulse measurement.

The

dsPIC33FJ32GS406/606/608/610

and

dsPIC33FJ64GS406/606/608/610 devices support up to

two input capture channels.

The input capture module captures the 16-bit value of

the selected Time Base register when an event occurs

at the ICx pin. The events that cause a capture event

are listed below in three categories:

• Simple Capture Event modes:

- Capture timer value on every falling edge of

input at ICx pin

- Capture timer value on every rising edge of

input at ICx pin

• Capture timer value on every edge (rising and

falling)

• Prescaler Capture Event modes:

- Capture timer value on every 4th rising edge

of input at ICx pin

- Capture timer value on every 16th rising

edge of input at ICx pin

Each input capture channel can select one of the

two 16-bit timers (Timer2 or Timer3) for the time

base. The selected timer can use either an internal

or external clock.

Other operational features include:

• Device wake-up from capture pin during CPU

Sleep and Idle modes

• Interrupt on input capture event

• 4-word FIFO buffer for capture values

- Interrupt optionally generated after 1, 2, 3 or

4 buffer locations are filled

• Use of input capture to provide additional sources

of external interrupts

FIGURE 14-1:

INPUT CAPTURE BLOCK DIAGRAM

Note 1: This data sheet summarizes the features

of the dsPIC33FJ32GS406/606/608/610

and

dsPIC33FJ64GS406/606/608/610

families of devices. It is not intended to be

a comprehensive reference source. To

complement the information in this data

sheet, refer to Section 12. “Input Cap-

ture” (DS70198) in the “dsPIC33F/

PIC24H Family Reference Manual”,

which is available from the Microchip web

site (www.microchip.com).

2: Some registers and associated bits

described in this section may not be avail-

able on all devices. Refer to Section 4.0

“Memory Organization” in this data

sheet for device-specific register and bit

information.

ICxBUF

ICx Pin

ICM<2:0> (ICxCON<2:0>)

Mode Select

Set Flag ICxIF

(in IFSx Register)

TMR2 TMR3

Edge Detection Logic

FIFO

R/W

Logic

ICxI<1:0>

ICOV, ICBNE (ICxCON<4:3>)

ICxCON

Interrupt

Logic

System Bus

From 16-Bit Timers

ICTMR

(ICxCON<7>)

Prescaler

Counter

(1, 4, 16)

and

Clock Synchronizer

Note 1: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.

dsPIC33FJ32GS608 Datasheet(PDF) 219 Page - Microchip Technology

dsPIC33FJ32GS608 Datasheet(HTML) 219 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL