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dsPIC33FJ32GS608 Datasheet(PDF) 273 Page - Microchip Technology

Part # dsPIC33FJ32GS608
Description  High-Performance, 16-bit Digital Signal Controllers
PDF  416 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

dsPIC33FJ32GS608 Datasheet(HTML) 273 Page - Microchip Technology

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 2009 Microchip Technology Inc.
Preliminary
DS70591B-page 273
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
20.0 UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules
available in the dsPIC33FJ32GS406/606/608/610 and
dsPIC33FJ64GS406/606/608/610 device families. The
UART is a full-duplex, asynchronous system that can
communicate with peripheral devices, such as
personal computers, LIN, RS-232 and RS-485
interfaces. The module also supports a hardware flow
control option with the UxCTS and UxRTS pins and
also includes an IrDA encoder and decoder.
The primary features of the UART module are:
• Full-Duplex, 8-Bit or 9-Bit Data Transmission
through the UxTX and UxRX pins
• Even, Odd or No Parity Options (for 8-bit data)
• One or Two Stop bits
• Hardware Flow Control Option with UxCTS and
UxRTS Pins
• Fully Integrated Baud Rate Generator with 16-Bit
Prescaler
• Baud Rates Ranging from 10 Mbps to 38 bps at
40 MIPS
• 4-Deep First-In First-Out (FIFO) Transmit Data
Buffer
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-bit mode with Address Detect
(9th bit = 1)
• Transmit and Receive Interrupts
• A Separate Interrupt for all UART Error Conditions
• Loopback mode for Diagnostic Support
• Support for Sync and Break Characters
• Support for Automatic Baud Rate Detection
• IrDA Encoder and Decoder Logic
• 16x Baud Clock Output for IrDA Support
• Support for DMA
A simplified block diagram of the UART module is
shown in Figure 20-1. The UART module consists of
these key hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
FIGURE 20-1:
UART SIMPLIFIED BLOCK DIAGRAM
Note 1: This data sheet summarizes the features
of the dsPIC33FJ32GS406/606/608/610
and
dsPIC33FJ64GS406/606/608/610
families of devices. It is not intended to be
a comprehensive reference source. To
complement the information in this data
sheet, refer to Section 17. “UART”
(DS70188) in the “dsPIC33F/PIC24H
Family Reference Manual”, which is avail-
able from the Microchip web site
(www.microchip.com).
2: Some registers and associated bits
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
UxRX
Hardware Flow Control
UART Receiver
UART Transmitter
UxTX
Baud Rate Generator
UxRTS
IrDA®
UxCTS



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