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PIC12F609-E/P Datasheet(PDF) 43 Page - Microchip Technology

Part # PIC12F609-E/P
Description  8-Pin, Flash-Based 8-Bit CMOS Microcontrollers
PDF  212 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC12F609-E/P Datasheet(HTML) 43 Page - Microchip Technology

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 2010 Microchip Technology Inc.
DS41302D-page 43
PIC12F609/615/617/12HV609/615
5.0
I/O PORT
There are as many as six general purpose I/O pins
available. Depending on which peripherals are enabled,
some or all of the pins may not be available as general
purpose I/O. In general, when a peripheral is enabled,
the associated pin may not be used as a general
purpose I/O pin.
5.1
GPIO and the TRISIO Registers
GPIO is a 6-bit wide port with 5 bidirectional and 1 input-
only pin. The corresponding data direction register is
TRISIO (Register 5-2). Setting a TRISIO bit (= 1) will
make the corresponding GPIO pin an input (i.e., disable
the output driver). Clearing a TRISIO bit (= 0) will make
the corresponding GPIO pin an output (i.e., enables
output driver and puts the contents of the output latch on
the selected pin). The exception is GP3, which is input
only and its TRIS bit will always read as ‘1’. Example 5-
1 shows how to initialize GPIO.
Reading the GPIO register (Register 5-1) reads the
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the PORT data latch. GP3 reads ‘0’ when
MCLRE = 1.
The TRISIO register controls the direction of the
GPIO pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISIO
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
EXAMPLE 5-1:
INITIALIZING GPIO
Note:
GPIO = PORTA
TRISIO = TRISA
Note:
The ANSEL register must be initialized to
configure an analog channel as a digital
input. Pins configured as analog inputs will
read ‘0’ and cannot generate an interrupt.
BANKSEL
GPIO
;
CLRF
GPIO
;Init GPIO
BANKSEL
ANSEL
;
CLRF
ANSEL
;digital I/O, ADC clock
;setting ‘don’t care’
MOVLW
0Ch
;Set GP<3:2> as inputs
MOVWF
TRISIO
;and set GP<5:4,1:0>
;as outputs
REGISTER 5-1:
GPIO: GPIO REGISTER
U-0
U-0
R/W-x
R/W-x
R-x
R/W-x
R/W-x
R/W-x
—
—
GP5
GP4
GP3
GP2
GP1
GP0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented: Read as ‘0’
bit 5-0
GP<5:0>: GPIO I/O Pin bit
1
= GPIO pin is > VIH
0
= GPIO pin is < VIL



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