WM2613

Production Data Rev 1.0

WOLFSON MICROELECTRONICS LTD

Production Data Rev 1.0 June 1999

10

SOFTWARE CONFIGURATION OPTIONS

DATA FORMAT

The WM2613 writes data either to one of the DAC holding latches or to the control register depending on

the address bits A1 and A0.

A1

A0

REGISTER

0

0

DAC LSW holding

0

1

DAC MSW holding

1

0

Reserved

1

1

Control

D7

D6

D5

D4

D3

D2

D1

D0

X

X

X

X

X

RLDAC

PWR

SPD

Table 2 Register Map

PROGRAMMABLE SETTLING TIME

Settling time is a software selectable 3.5

µs or 1µs, typical to within ±0.5LSB of final value. This is

controlled by the value of SPD – Bit D12. A ONE defines a settling time of 1

µs, a ZERO defines a settling

time of 3.5

µs.

PIN

BIT

SPD

SPD

MODE

0

0

Slow

0

1

Fast

1

0

Fast

1

1

Fast

Table 3 Programmable Settling Time

PROGRAMMABLE POWER DOWN

The power down function can be controlled by PWR. A ZERO configures the device as active, or fully

powered up, a ONE configures the device into power down mode. When the power down function is

released the device reverts to the DAC code set prior to power down.

PIN

BIT

NPD

PWR

POWER

0

0

Down

0

1

Down

1

0

Normal

1

1

Down

Table 4 Programmable Power Down

LOAD DAC LATCH

Bit RLDAC controls the function of the DAC latch. A ONE configures the DAC latch as transparent. A

ZERO configures the DAC latch to be controlled by pin NLDAC.

PIN

BIT

NLDAC

RLDAC

LATCH

0

0

Transparent

0

1

Transparent

1

0

Hold

1

1

Transparent

Table 5 Load DAC Latch