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SS4005G Datasheet(PDF) 13 Page - Silicon Standard Corp. |
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SS4005G Datasheet(HTML) 13 Page - Silicon Standard Corp. |
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13 / 22 page ![]() www.SiliconStandard.com 13 of 22 SS4005G 7/16/2006 Rev.3.01 Table 4. Bit definitions of PackConfigure - SEAL - CPLV VCOR CHEM LCC1 LCC0 7 6 5 4 3 2 1 0 bit 7: Not used. 1: no effect 0: no effect bit 6: SEAL 1: Sealed, Commands from ManufacturerAccess() are disabled 0: Not Sealed bit 5: Not used 1: no effect 0: no effect bit 4: CPLV, Pack Low(Exhausted) Voltage compensation base on load and temperature. 1: Enable compensation 0: Disable compensation bit 3: VCOR: Mid-range capacity correction with pack voltage 1: Enable mid-range correction 0: Disable mid-range correction bit 2: CHEM. 1: no effect 0: Li-Ion chemistry (default) bit 1,0: LCC1/LCC0. 0, 0: Pack Stack (No cell voltage) 0, 1: 2-serial pack 1, 0: 3-serial pack 1, 1: 4-serial pack Table 5. Bit definitions of PackStatus BL VCurr VDP COn DOn CVOV CVUV 7 6 5 4 3 2 1 0 bit 7: Reserved. bit 6: BL indicates that a Battery Low condition was detected 1: Battery voltage was detected below Package Low Voltage(PLV). 0: No Battery Low condition was detected. bit 5: VCurr (Valid Current) is detected 1: |I| > IVALID. 0: |I| ? ?? VALID bit 4: VDP is set when a valid discharge period is on going. 1: Valid discharge period is on going 0: Not a valid discharge period bit 3: COn (Charge FET ON) is set when charging is allowed. 1: Charge FET On 0: Charging is not allowed bit 2: DOn (Discharge FET On) is set when the discharge from battery pack is determined to be safety 1: Discharge FET On 0: Discharge FET Off bit 1: CVOV (Cell Voltage Over Voltage) is set when battery pack/cell voltage is detected as over predefined value 1: Over Voltage 0: Normal bit 0: CVUV (Pack Voltage Under Voltage) is set when pack voltage is detected as below lower .boundary 1: Under Voltage 0: Normal |
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