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PSMN2R2-40PS Datasheet(PDF) 2 Page - NXP Semiconductors |
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PSMN2R2-40PS Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 13 page ![]() PSMN2R2-40PS_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 28 September 2009 2 of 13 NXP Semiconductors PSMN2R2-40PS N-channel 40 V 2.1 m Ω standard level MOSFET 2. Pinning information 3. Ordering information 4. Limiting values Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1G gate SOT78 (TO-220AB) 2D drain 3S source mb D drain 12 mb 3 S D G mbb076 Table 3. Ordering information Type number Package Name Description Version PSMN2R2-40PS TO-220AB plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 40 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 175 °C; RGS =20kΩ -40 V VGS gate-source voltage -20 20 V ID drain current VGS =10V; Tmb = 100 °C; see Figure 1 -100 A VGS =10V; Tmb =25°C; see Figure 1 and 3 -100 A IDM peak drain current tp ≤ 10 µs; pulsed; Tmb =25°C; see Figure 3 -962 A Ptot total power dissipation Tmb =25°C; see Figure 2 -306 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C |
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