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PCA9540BDP Datasheet(PDF) 1 Page - NXP Semiconductors |
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PCA9540BDP Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 22 page ![]() 1. General description The PCA9540B is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus. The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels. Only one SCx/SDx channel is selected at a time, determined by the contents of the programmable control register. A power-on reset function puts the registers in their default state and initializes the I2C-bus state machine with no channels selected. The pass gates of the multiplexer are constructed such that the VDD pin can be used to limit the maximum high voltage that will be passed by the PCA9540B. This allows the use of different bus voltages on each SCx/SDx pair, so that 1.8 V, 2.5 V or 3.3 V parts can communicate with 5 V parts without any additional protection. External pull-up resistors can pull the bus up to the desired voltage level for this channel. All I/O pins are 5 V tolerant. 2. Features I 1-of-2 bidirectional translating multiplexer I I2C-bus interface logic; compatible with SMBus standards I Channel selection via I2C-bus I Power up with all multiplexer channels deselected I Low Ron switches I Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses I No glitch on power-up I Supports hot insertion I Low standby current I Operating power supply voltage range of 2.3 V to 5.5 V I 5 V tolerant inputs I 0 Hz to 400 kHz clock frequency I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD2-A115 and 1000 V CDM per JESD22-C101 I Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA I Packages offered: SO8, TSSOP8, XSON8U PCA9540B 2-channel I2C-bus multiplexer Rev. 04 — 3 September 2009 Product data sheet |
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