HT86AR72 datasheet(24/68 Pages) HOLTEK

24 / 68 page

HT86Axx/HT86ARxx

Rev. 1.00

March 19, 2010

routine is entered to disable further interrupt and is set

by executing the

²RETI² instruction.

Note: In situations where other interrupts may require

servicing within present interrupt service rou-

tines, the EMI bit can be manually set by the pro-

gram after the present interrupt service routine

has been entered.

Timer Registers

All devices contain four 8-bit Timers whose associated

registers are known as TMR0, TMR1, TMR2 and TMR3,

which are the locations where the associated timer's

8-bit value is located. Their associated control registers,

known as TMR0C, TMR1C, TMR2C and TMR3C, con-

tain the setup information for these timers. Note that all

timer registers can be directly written to in order to

preload their contents with fixed data to allow different

time intervals to be setup.

Input/Output Ports and Control Registers

Within the area of Special Function Registers, the I/O

registers and their associated control registers play a

prominent role. All I/O ports have a designated register

correspondingly labeled as PA, PB, PC, PD, PE, etc.

These labeled I/O registers are mapped to specific ad-

dresses within the Data Memory as shown in the Data

Memory table, which are used to transfer the appropri-

ate output or input data on that port. With each I/O port

there is an associated control register labeled PAC,

PBC, PCC, PDC, PEC, etc., also mapped to specific ad-

dresses with the Data Memory. The control register

specifies which pins of that port are set as inputs and

which are set as outputs. To setup a pin as an input, the

corresponding bit of the control register must be set

high, for an output it must be set low. During program in-

itialisation, it is important to first setup the control regis-

ters to specify which pins are outputs and which are

inputs before reading data from or writing data to the I/O

ports. One flexible feature of these registers is the ability

to directly program single bits using the

²SET [m].i² and

²CLR [m].i² instructions. The ability to change I/O pins

from output to input and vice-versa by manipulating spe-

cific bits of the I/O control registers during normal pro-

gram operation is a useful feature of these devices.

Voice ROM Data Address Latch Counter Registers

These are the LATCH0H/LATCH0M/LATCH0L,

LATCH1H/LATCH1M/LATCH1L and the Voice ROM

data registers. The voice ROM data address latch coun-

ter provides the handshaking between the

microcontroller and the voice ROM, where the voice

codes are stored. Eight bits of voice ROM data will be

addressed by using the 21-bit address latch counter,

which is composed of LATCH0H/LATCH0M/LATCH0L

or LATCH1H/LATCH1M/LATCH1L. After the 8-bit voice

ROM data is addressed, several instruction cycles of at

least 4

ms at least, will be required to latch the voice ROM

data, after which the microcontroller can read the voice

data from LATCHD.

Voice Control and Audio output Registers

VOICEC, DAL, DAH, VOL

The device includes a single 12-bit current type DAC

function for driving an external 8

W speaker through an

external NPN transistor. The programmer must write the

voice data to the DAL/DAH registers.

A/D Converter Registers

ADRL, ADRH, ADCR, ACSR

The device contains a 4-channel 12-bit A/D converter.

The correct operation of the A/D requires the use of two

data registers, a control register and a clock source reg-

ister. It contain a 12-bit A/D converter, there are two data

registers, a high byte data register known as ADRH, and

a low byte data register known as ADRL. These are the

the completion of an analog to digital conversion cycle.

The channel selection and configuration of the A/D con-

verter is setup via the control register ADCR while the

A/D clock frequency is defined by the clock source reg-

ister, ACSR.

Input/Output Ports

Holtek microcontrollers offer considerable flexibility on

their I/O ports. With the input or output designation of ev-

ery pin fully under user program control, pull-high op-

tions for all ports and wake-up options on certain pins,

the user is provided with an I/O structure to meet the

needs of a wide range of application possibilities.

Depending upon which device or package is chosen,

the microcontroller range provides 40 bidirectional in-

put/output lines labeled with port names PA, PB, PC,

PD, PE, etc. These I/O ports are mapped to the RAM

Data Memory with specific addresses as shown in the

Special Purpose Data Memory table. All of these I/O

ports can be used for input and output operations. For

input operation, these ports are non-latching, which

means the inputs must be ready at the T2 rising edge of

instruction

²MOV A,[m]², where m denotes the port ad-

dress. For output operation, all the data is latched and

remains unchanged until the output latch is rewritten.

Pull-high Resistors

Many product applications require pull-high resistors for

their switch inputs usually requiring the use of an exter-

nal resistor. To eliminate the need for these external re-

sistors, all I/O pins, when configured as an input have

the capability of being connected to an internal pull-high

resistor. These pull-high resistors are selectable via

configuration options and are implemented using a

weak PMOS transistor. Note that if the pull-high option is

HT86AR72 Datasheet(PDF) 24 Page - Holtek Semiconductor Inc

HT86AR72 Datasheet(HTML) 24 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Datasheet Download

Link URL