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PIC18F87J72 Datasheet(PDF) 56 Page - Microchip Technology |
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PIC18F87J72 Datasheet(HTML) 56 Page - Microchip Technology |
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56 / 480 page ![]() PIC18F87J72 FAMILY DS39979A-page 56 Preliminary 2010 Microchip Technology Inc. 6.1.1 HARD MEMORY VECTORS All PIC18 devices have a total of three hard-coded return vectors in their program memory space. The Reset vector address is the default value to which the program counter returns on all device Resets; it is located at 0000h. PIC18 devices also have two interrupt vector addresses for the handling of high-priority and low-priority interrupts. The high-priority interrupt vector is located at 0008h and the low-priority interrupt vector is at 0018h. Their locations in relation to the program memory map are shown in Figure 6-2. FIGURE 6-2: HARD VECTOR AND CONFIGURATION WORD LOCATIONS FOR PIC18F87J72 FAMILY FAMILY DEVICES 6.1.2 FLASH CONFIGURATION WORDS Because PIC18F87J72 family devices do not have per- sistent configuration memory, the top four words of on-chip program memory are reserved for configuration information. On Reset, the configuration information is copied into the Configuration registers. The Configuration Words are stored in their program memory location in numerical order, starting with the lower byte of CONFIG1 at the lowest address and end- ing with the upper byte of CONFIG4. For these devices, only Configuration Words, CONFIG1 through CONFIG3, are used; CONFIG4 is reserved. The actual addresses of the Flash Configuration Word for devices in the PIC18F87J72 family are shown in Table 6-1. Their location in the memory map is shown with the other memory vectors in Figure 6-2. Additional details on the device Configuration Words are provided in Section 26.1 “Configuration Bits”. TABLE 6-1: FLASH CONFIGURATION WORD FOR PIC18F87J72 FAMILY DEVICES Reset Vector Low-Priority Interrupt Vector 0000h 0018h On-Chip Program Memory High-Priority Interrupt Vector 0008h 1FFFFFh (Top of Memory) (Top of Memory-7) Flash Configuration Words Read ‘0’ Legend: (Top of Memory) represents upper boundary of on-chip program memory space (see Figure 6-1 for device-specific values). Shaded area represents unimplemented memory. Areas are not shown to scale. Device Program Memory (Kbytes) Configuration Word Addresses PIC18F86J72 64 FFF8h to FFFFh PIC18F87J72 128 1FFF8h to 1FFFFh |
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