 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
PIC18F23K20-E/ML Datasheet(PDF) 400 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC18F23K20-E/ML Datasheet(HTML) 400 Page - Microchip Technology |
|
|
400 / 456 page  PIC18F2XK20/4XK20 DS41303G-page 400 2010 Microchip Technology Inc. FIGURE 26-20: EUSART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING TABLE 26-22: EUSART SYNCHRONOUS TRANSMISSION REQUIREMENTS FIGURE 26-21: EUSART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING TABLE 26-23: EUSART SYNCHRONOUS RECEIVE REQUIREMENTS 121 121 120 122 RC6/TX/CK RC7/RX/DT pin pin Note: Refer to Figure 26-4 for load conditions. Param No. Symbol Characteristic Min Max Units Conditions 120 TckH2dtV SYNC XMIT (MASTER & SLAVE) Clock High to Data Out Valid — 40 ns 121 Tckrf Clock Out Rise Time and Fall Time (Master mode) —20 ns 122 Tdtrf Data Out Rise Time and Fall Time — 20 ns 125 126 RC6/TX/CK RC7/RX/DT pin pin Note: Refer to Figure 26-4 for load conditions. Param. No. Symbol Characteristic Min Max Units Conditions 125 TdtV2ckl SYNC RCV (MASTER & SLAVE) Data Setup before CK (DT setup time) 10 — ns 126 TckL2dtl Data Hold after CK (DT hold time) 15 — ns |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
