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PIC18F87J93 Datasheet(PDF) 21 Page - Microchip Technology

Part # PIC18F87J93
Description  64/80-Pin, High-Performance Microcontrollers with LCD Driver, 12-Bit A/D and nanoWatt Technology
PDF  54 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F87J93 Datasheet(HTML) 21 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
Preliminary
DS39948A-page 19
PIC18F87J93 FAMILY
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/INT0/SEG30
RB0
INT0
SEG30
58
I/O
I
O
TTL
ST
Analog
Digital I/O.
External Interrupt 0.
SEG30 output for LCD.
RB1/INT1/SEG8
RB1
INT1
SEG8
57
I/O
I
O
TTL
ST
Analog
Digital I/O.
External Interrupt 1.
SEG8 output for LCD.
RB2/INT2/SEG9/CTED1
RB2
INT2
SEG9
CTED1
56
I/O
I
O
I
TTL
ST
Analog
ST
Digital I/O.
External Interrupt 2.
SEG9 output for LCD.
CTMU Edge 1 input.
RB3/INT3/SEG10/
CTED2
RB3
INT3
SEG10
CTED2
55
I/O
I
O
I
TTL
ST
Analog
ST
Digital I/O.
External Interrupt 3.
SEG10 output for LCD.
CTMU Edge 2 input.
RB4/KBI0/SEG11
RB4
KBI0
SEG11
54
I/O
I
O
TTL
TTL
Analog
Digital I/O.
Interrupt-on-change pin.
SEG11 output for LCD.
RB5/KBI1/SEG29
RB5
KBI1
SEG29
53
I/O
I
O
TTL
TTL
Analog
Digital I/O.
Interrupt-on-change pin.
SEG29 output for LCD.
RB6/KBI2/PGC
RB6
KBI2
PGC
52
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP™ programming clock pin.
RB7/KBI3/PGD
RB7
KBI3
PGD
47
I/O
I
I/O
TTL
TTL
ST
Digital I/O.
Interrupt-on-change pin.
In-Circuit Debugger and ICSP programming data pin.
TABLE 1-4:
PIC18F8XJ93 (80-PIN DEVICE) PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
TQFP
Legend: TTL = TTL compatible input
CMOS
= CMOS compatible input or output
ST
= Schmitt Trigger input with CMOS levels
Analog = Analog input
I
= Input
O
= Output
P
= Power
OD
= Open-Drain (no P diode to VDD)
Note 1:
Default assignment for CCP2 when the CCP2MX Configuration bit is set.
2:
Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.



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