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PIC24F16KA102 Datasheet(PDF) 128 Page - Microchip Technology |
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PIC24F16KA102 Datasheet(HTML) 128 Page - Microchip Technology |
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128 / 254 page ![]() PIC24F16KA102 FAMILY DS39927B-page 126 Preliminary © 2009 Microchip Technology Inc. REGISTER 15-2: PADCFG1: PAD CONFIGURATION CONTROL REGISTER U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — — — SMBUSDEL(3) OC1TRIS RTSECSEL1(1,4) RTSECSEL0(1,4) — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-5 Unimplemented: Read as ‘0’ bit 3 OC1TRIS: OC1 Output Tri-State Select bit 1 = OC1 output will not be active on the pin; OCPWM1 can still be used for internal triggers 0 = OC1 output will be active on the pin based on the OCPWM1 module settings bit 0 Unimplemented: Read as ‘0’ Note 1: To enable the actual RTCC output, the RTCOE (RCFGCAL) bit needs to be set. 2: To enable the actual OC1 output, the OCPWM1 module has to be enabled. 3: Bit 4 is described in Section 17.0 “Inter-Integrated Circuit (I2C™)”. 4: Bits 2 and 1 are described in Section 19.0 Real-Time Clock and Calendar (RTCC). |
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