PIC16F688-ISLASHML datasheet(129/204 Pages) MICROCHIP

129 / 204 page

DS41203E-page 127

PIC16F688

11.9

In-Circuit Serial Programming

This allows customers to manufacture boards with

unprogrammed

devices

and

then

program

the

microcontroller just before shipping the product. This

also allows the most recent firmware or a custom

firmware to be programmed.

The device is placed into a Program/Verify mode by

holding the RA0 and RA1 pins low, while raising the

MCLR

(VPP)

from

VIL

VIHH.

See

the

“PIC12F6XX/16F6XX

Memory

Programming

Specification” (DS41204) for more information. RA0

becomes the programming data and RA1 becomes the

programming clock. Both RA0 and RA1 are Schmitt

Trigger inputs in Program/Verify mode.

A typical In-Circuit Serial Programming connection is

shown in Figure 11-11.

FIGURE 11-11:

TYPICAL IN-CIRCUIT

SERIAL PROGRAMMING

CONNECTION

11.10 In-Circuit Debugger

Since in-circuit debugging requires access to the data

and MCLR pins, MPLAB® ICD 2 development with an

14-pin device is not practical. A special 20-pin

PIC16F688 ICD device is used with MPLAB ICD 2 to

provide separate clock, data and MCLR pins and frees

all normally available pins to the user.

A special debugging adapter allows the ICD device to

be used in place of a PIC16F688 device. The

debugging adapter is the only source of the ICD device.

When the ICD pin on the PIC16F688 ICD device is held

low, the In-Circuit Debugger functionality is enabled.

This function allows simple debugging functions when

used with MPLAB ICD 2. When the microcontroller has

this feature enabled, some of the resources are not

available for general use. Table 11-9 shows which

features are consumed by the background debugger:

TABLE 11-9:

DEBUGGER RESOURCES

For more information, see “MPLAB® ICD 2 In-Circuit

Debugger User’s Guide” (DS51331), available on

Microchip’s web site (www.microchip.com).

FIGURE 11-12:

20-PIN ICD PINOUT

External

Connector

Signals

To Normal

Connections

To Normal

Connections

PIC16F688

VDD

VSS

MCLR/VPP/RA3

RA1

RA0

+5V

VPP

CLK

Data I/O

* Isolation devices (as required)

Resource

Description

I/O pins

ICDCLK, ICDDATA

Stack

1 level

Program Memory

Address 0h must be NOP

700h-7FFh

20-Pin PDIP

In-Circuit Debug Device

ICDMCLR/VPP

VDD

RA5

RA4

RA3

ICDCLK

ICDDATA

Vss

RA0

ICD

RA1

RA2

RC5

RC4

RC3

RC0

RC1

RC2

PIC16F688-I/ML Datasheet(PDF) 129 Page - Microchip Technology

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