PIC18F4580-ESLASHML datasheet(343/490 Pages) MICROCHIP

343 / 490 page

DS39637D-page 343

PIC18F2480/2580/4480/4580

FIGURE 24-6:

LENGTHENING A BIT PERIOD (ADDING SJW TO PHASE SEGMENT 1)

FIGURE 24-7:

SHORTENING A BIT PERIOD (SUBTRACTING SJW FROM PHASE SEGMENT 2)

24.11 Programming Time Segments

Some requirements for programming of the time

segments:

• Prop_Seg + Phase_Seg 1

≥ Phase_Seg 2

• Phase_Seg 2

≥ Sync Jump Width.

For example, assume that a 125 kHz CAN baud rate is

desired, using 20 MHz for FOSC. With a TOSC of 50 ns,

a baud rate prescaler value of 04h gives a TQ of 500 ns.

To obtain a Nominal Bit Rate of 125 kHz, the Nominal

Bit Time must be 8

μs or 16 TQ.

Using 1 TQ for the Sync_Seg, 2 TQ for the Prop_Seg

and 7 TQ for Phase Segment 1 would place the sample

point at 10 TQ after the transition. This leaves 6 TQ for

Phase Segment 2.

By the rules above, the Sync Jump Width could be the

maximum of 4 TQ. However, normally a large SJW is

only necessary when the clock generation of the

different nodes is inaccurate or unstable, such as using

ceramic resonators. Typically, an SJW of 1 is enough.

24.12 Oscillator Tolerance

As a rule of thumb, the bit timing requirements allow

ceramic resonators to be used in applications with

transmission rates of up to 125 Kbit/sec. For the full bus

speed range of the CAN protocol, a quartz oscillator is

required. Refer to ISO11898-1 for oscillator tolerance

requirements.

Input

Sync

Prop

Segment

Phase

Segment 1

Phase

Segment 2

≤ SJW

Sample Point

Signal

Nominal Bit Length

Actual Bit Length

Bit

Time

Segments

Sync

Prop

Segment

Phase

Segment 1

Phase

Segment 2

≤ SJW

Sample Point

Nominal Bit Length

Actual Bit Length

PIC18F4580-E/ML Datasheet(PDF) 343 Page - Microchip Technology

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