| Electronic Components Datasheet Search |
|
PIC18F4580-E/ML Datasheet(PDF) 481 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC18F4580-E/ML Datasheet(HTML) 481 Page - Microchip Technology |
|
481 / 490 page ![]() © 2009 Microchip Technology Inc. DS39637D-page 481 PIC18F2480/2580/4480/4580 PORTB Associated Registers ............................................... 140 I/O Summary ............................................................ 139 LATB Register .......................................................... 138 PORTB Register ...................................................... 138 TRISB Register ........................................................ 138 PORTC Associated Registers ............................................... 142 I/O Summary ............................................................ 142 LATC Register ......................................................... 141 PORTC Register ...................................................... 141 RC3/SCK/SCL Pin ................................................... 205 TRISC Register ........................................................ 141 PORTD Associated Registers ............................................... 145 I/O Summary ............................................................ 144 LATD Register ......................................................... 143 Parallel Slave Port (PSP) Function .......................... 143 PORTD Register ...................................................... 143 TRISD Register ........................................................ 143 PORTE Associated Registers ............................................... 148 I/O Summary ............................................................ 148 LATE Register .......................................................... 146 PORTE Register ...................................................... 146 PSP Mode Select (PSPMODE Bit) .......................... 143 TRISE Register ........................................................ 146 Postscaler, WDT Assignment (PSA Bit) .............................................. 153 Rate Select (T0PS2:T0PS0 Bits) ............................. 153 Switching Between Timer0 and WDT ...................... 153 Power-Managed Modes ..................................................... 39 and A/D Operation ................................................... 260 and EUSART Operation ........................................... 235 and Multiple Sleep Commands .................................. 40 Clock Transitions and Status Indicators ..................... 40 Effects on Clock Sources ........................................... 37 Entering ...................................................................... 39 Exiting Idle and Sleep Modes .................................... 45 by Interrupt ......................................................... 45 by Reset ............................................................. 45 by WDT Time-out ............................................... 45 Without an Oscillator Start-up Delay .................. 46 Idle Modes ................................................................. 43 PRI_IDLE ........................................................... 44 RC_IDLE ............................................................ 45 SEC_IDLE ......................................................... 44 Run Modes ................................................................. 40 PRI_RUN ........................................................... 40 RC_RUN ............................................................ 41 SEC_RUN .......................................................... 40 Selecting .................................................................... 39 Sleep Mode ................................................................ 43 Summary (table) ........................................................ 39 Power-on Reset (POR) ...................................................... 49 Oscillator Start-up Timer (OST) ................................. 51 Power-up Timer (PWRT) ........................................... 51 Time-out Sequence .................................................... 51 Power-up Delays ................................................................ 37 Power-up Timer (PWRT) ............................................. 37, 51 Prescaler Timer2 ...................................................................... 180 Prescaler, Capture ........................................................... 169 Prescaler, Timer0 ............................................................ 153 Assignment (PSA Bit) .............................................. 153 Rate Select (T0PS2:T0PS0 Bits) ............................. 153 Switching Between Timer0 and WDT ...................... 153 Prescaler, Timer2 ............................................................ 174 PRI_IDLE Mode ................................................................. 44 PRI_RUN Mode ................................................................. 40 Program Counter ............................................................... 68 PCL, PCH and PCU Registers .................................. 68 PCLATH and PCLATU Registers .............................. 68 Program Memory and the Extended Instruction Set .............................. 98 Code Protection ....................................................... 364 Instructions ................................................................ 72 Two-Word .......................................................... 72 Interrupt Vector .......................................................... 67 Look-up Tables .......................................................... 70 Map and Stack (diagram) .......................................... 67 Reset Vector .............................................................. 67 Program Verification and Code Protection ...................... 363 Associated Registers ............................................... 364 Programming, Device Instructions ................................... 367 PSP. See Parallel Slave Port. Pulse-Width Modulation. See PWM (CCP Module) and PWM (ECCP Module). PUSH ............................................................................... 396 PUSH and POP Instructions .............................................. 69 PUSHL ............................................................................. 412 PWM (CCP Module) ........................................................ 173 Associated Registers ............................................... 175 Auto-Shutdown ........................................................ 174 CCPR1H:CCPR1L Registers .................................. 173 Duty Cycle ............................................................... 173 Example Frequencies/Resolutions .......................... 174 Period ...................................................................... 173 Setup for PWM Operation ....................................... 174 TMR2 to PR2 Match ................................................ 173 PWM (ECCP Module) ...................................................... 179 Associated Registers ............................................... 190 Direction Change in Full-Bridge Output Mode ......... 184 Duty Cycle ............................................................... 180 ECCPR1H:ECCPR1L Registers .............................. 179 Effects of a Reset .................................................... 189 Enhanced PWM Auto-Shutdown ............................. 186 Example Frequencies/Resolutions .......................... 180 Full-Bridge Application Example .............................. 184 Full-Bridge Mode ..................................................... 183 Half-Bridge Mode ..................................................... 182 Half-Bridge Output Mode Applications Example ..... 182 Output Configurations .............................................. 180 Output Relationships (Active-High) ......................... 181 Output Relationships (Active-Low) .......................... 181 Period ...................................................................... 179 Programmable Dead-Band Delay ............................ 186 Start-up Considerations ........................................... 188 TMR2 to PR2 Match ................................................ 179 Q Q Clock .................................................................... 174, 180 R RAM. See Data Memory. RC Oscillator ...................................................................... 31 RCIO Oscillator Mode ................................................ 31 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |