PIC18F4580-ESLASHML datasheet(191/490 Pages) MICROCHIP

191 / 490 page

DS39637D-page 191

PIC18F2480/2580/4480/4580

18.0 MASTER SYNCHRONOUS

SERIAL PORT (MSSP)

MODULE

18.1

Master SSP (MSSP) Module

Overview

The Master Synchronous Serial Port (MSSP) module is

a serial interface, useful for communicating with other

peripheral or microcontroller devices. These peripheral

devices may be serial EEPROMs, shift registers,

display drivers, A/D Converters, etc. The MSSP

module can operate in one of two modes:

• Serial Peripheral Interface (SPI)

• Inter-Integrated Circuit (I2C)

- Full Master mode

- Slave mode (with general address call)

The I2C interface supports the following modes in

hardware:

•Master mode

• Multi-Master mode

• Slave mode

18.2

Control Registers

The MSSP module has three associated registers.

These include a status register (SSPSTAT) and two

control registers (SSPCON1 and SSPCON2). The use

of these registers and their individual configuration bits

differ significantly depending on whether the MSSP

module is operated in SPI or I2C mode.

Additional details are provided under the individual

sections.

18.3

SPI Mode

The SPI mode allows 8 bits of data to be synchronously

transmitted and received simultaneously. All four

modes of SPI are supported. To accomplish

communication, typically three pins are used:

• Serial Data Out (SDO) – RC5/SDO

• Serial Data In (SDI) – RC4/SDI/SDA

• Serial Clock (SCK) – RC3/SCK/SCL

Additionally, a fourth pin may be used when in a Slave

mode of operation:

• Slave Select (SS) – RA5/AN4/SS/HLVDIN

Figure 18-1 shows the block diagram of the MSSP

module when operating in SPI mode.

FIGURE 18-1:

MSSP BLOCK DIAGRAM

(SPI MODE)

(

)

Read

Write

Internal

Data Bus

SSPSR reg

SSPM<3:0>

bit 0

Shift

Clock

SS Control

Enable

Edge

Select

Clock Select

TMR2 Output

TOSC

Prescaler

4, 16, 64

Edge

Select

Data to TX/RX in SSPSR

TRIS bit

SMP:CKE

SDO

SSPBUF reg

SDI

SCK

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