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ADT7483AARQZ-R7 Datasheet(PDF) 15 Page - ON Semiconductor

Part # ADT7483AARQZ-R7
Description  Dual Channel Temperature Sensor and Over Temperature Alarm
PDF  24 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

ADT7483AARQZ-R7 Datasheet(HTML) 15 Page - ON Semiconductor

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ADT7483A
Rev. 1 | Page 15 of 24 | www.onsemi.com
The value in the offset register is added or subtracted to the
measured value of the remote temperature.
The offset register powers up with a default value of 0°C and
will have no effect unless the user writes a different value to it.
Table 13. Sample Offset Register Codes
Offset Value
0x11/0x34
0x12/0x35
−128°C
1000 0000
00 00 0000
−4°C
1111 1100
00 00 0000
−1°C
1111 1111
00 000000
−0.25°C
1111 1111
10 00 0000
0°C
0000 0000
00 00 0000
+0.25°C
0000 0000
01 00 0000
+1°C
0000 0001
00 00 0000
+4°C
0000 0100
00 00 0000
+127.75°C
0111 1111
11 00 0000
One-Shot Register
The one-shot register is used to initiate a conversion and
comparison cycle when the ADT7483A is in standby mode,
after which the device returns to standby. Writing to the one-
shot register address (0x0F) causes the ADT7483A to perform
a conversion and comparison on both the local and the remote
temperature channels. This is not a data register as such, and it
is the write operation to Address 0x0F that causes the one-shot
conversion. The data written to this address is irrelevant and is
not stored.
Consecutive ALERT Register
The value written to this register determines how many out-of-
limit measurements must occur before an ALERT is generated.
The default value is that one out-of-limit measurement generates
an ALERT. The maximum value that can be chosen is 4. The
purpose of this register is to allow the user to perform some
filtering of the output. This is particularly useful at the fastest
three conversion rates, where no averaging takes place. This
register is at Address 0x22.
Table 14. Consecutive ALERT Register Bit
Register
Value
Number of Out-of-Limit
Measurements Required
yzax 000x
1
yzax 001x
2
yzax 011x
3
yzax 111x
4
x = don’t care bit.
y = SMBus SCL timeout bit. Default = 0. See the SMBus section for more
information.
z = SMBus SDA timeout bit. Default = 0. See the SMBus section for more
information.
a = mask internal ALERTs



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