68HC05E1 datasheet(21/86 Pages) FREESCALE

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MC68HC05E1 — Revision 2.0

General Release Speciﬁcation

Operating Modes

General Release Specification — MC68HC05E1

Section 2. Operating Modes

2.1 Contents

2.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

2.3

Single-Chip Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

2.4

Self-Check Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

2.4.1

Timer Test Subroutine . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

2.4.2

ROM Checksum Subroutine. . . . . . . . . . . . . . . . . . . . . . . . .24

2.4.3

Additional Self-Check Routines . . . . . . . . . . . . . . . . . . . . . .25

2.4.3.1

Self-Check PLL Disabled . . . . . . . . . . . . . . . . . . . . . . . . .26

2.4.3.2

Jump to RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

2.4.3.3

Load RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

2.2 Introduction

The MCU has 3 modes of operation: Single-chip mode, Self-Check

Mode, and Test Mode. Table 2-1 shows the conditions required to go

into each mode.

Table 2-1. Operating Mode Conditions

RESET

IRQ

PB1

Mode

VSS–VDD

Single Chip

VTST

VDD

Self Check

VTST

VSS

Factory Test

VTST = 2 x VDD

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