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MRF24J40 Datasheet(PDF) 75 Page - Microchip Technology |
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MRF24J40 Datasheet(HTML) 75 Page - Microchip Technology |
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75 / 156 page  REGISTER 2-82: TESTMODE: TEST MODE REGISTER (ADDRESS: 0x22F) R/W-0 R/W-0 R/W-0 R/W-0 R/W-1 R/W-0 R/W-0 R/W-0 r r r RSSIWAIT1 RSSIWAIT0 TESTMODE2 TESTMODE1 TESTMODE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7-5 Reserved: Maintain as ‘0’ bit 4-3 RSSIWAIT<1:0>: RSSI State Machine Parameter bits 01 = Optimized value (default) bit 2-0 TESTMODE<2:0>: Test Mode bits 111 = GPIO0, GPIO1 and GPIO2 are configured to control an external PA and/or LNA(1) 101 = Single Tone Test mode 000 = Normal operation (default) Note 1: Refer to Section 4.2 “External PA/LNA Control” for more information. © 2010 Microchip Technology Inc. Preliminary DS39776C-page 75 MRF24J40 |
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