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SST25VF020B Datasheet(PDF) 21 Page - Silicon Storage Technology, Inc |
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SST25VF020B Datasheet(HTML) 21 Page - Silicon Storage Technology, Inc |
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21 / 33 page ![]() Data Sheet 2 Mbit SPI Serial Flash SST25VF020B 21 ©2010 Silicon Storage Technology, Inc. S71417-02-000 04/10 FIGURE 21: Enable-Write-Status-Register (EWSR) or Write-Enable (WREN) and Write-Status-Register (WRSR) Word-Data Input Sequence The WRSR instruction can either execute a byte-data or a word-data input. Extra data/clock input, or within byte-/ word-data input, will not be executed. The reason for the byte support is for backward compatibility to products where WRSR instruction sequence is followed by only a byte-data. JEDEC Read-ID The JEDEC Read-ID instruction identifies the device as SST25VF020B and the manufacturer as SST. The device information can be read from executing the 8-bit command, 9FH. Following the JEDEC Read-ID instruction, the 8-bit manufacturer’s ID, BFH, is output from the device. After that, a 16-bit device ID is shifted out on the SO pin. Byte 1, BFH, identifies the manufacturer as SST. Byte 2, 25H, iden- tifies the memory type as SPI Serial Flash. Byte 3, 8CH, identifies the device as SST25VF020B. The instruction sequence is shown in Figure 22. The JEDEC Read ID instruction is terminated by a low to high transition on CE# at any time during data output. FIGURE 22: JEDEC Read-ID Sequence 1417 EWSR1.0 MODE 3 HIGH IMPEDANCE MODE 0 STATUS REGISTER 76 54 3 2 10 MSB MSB MSB 01 MODE 3 SCK SI SO CE# MODE 0 50 or 06 0 1 234 5 6 7 0 1 234 5 6 789 10 11 12 13 14 15 STATUS REGISTER 1 76 54 3 2 10 MSB 16 17 18 19 20 21 22 23 25 8C 1417 JEDECID.1 CE# SO SI SCK 012345678 HIGH IMPEDANCE 15 16 14 28 29 30 31 BF MODE 3 MODE 0 MSB MSB 9 10111213 1718 9F 19 20 21 22 23 24 25 26 27 TABLE 7: JEDEC Read-ID Data Device ID Manufacturer’s ID Memory Type Memory Capacity Byte1 Byte 2 Byte 3 BFH 25H 8CH T7.0 1417 |
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