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SST25WF512 Datasheet(PDF) 13 Page - Silicon Storage Technology, Inc |
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SST25WF512 Datasheet(HTML) 13 Page - Silicon Storage Technology, Inc |
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13 / 32 page ![]() Data Sheet 512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit 1.8V SPI Serial Flash SST25WF512 / SST25WF010 / SST25WF020 / SST25WF040 13 ©2009 Silicon Storage Technology, Inc. S71328-08-000 11/09 Byte-Program The Byte-Program instruction programs the bits in the selected byte to the desired data. The selected byte must be in the erased state (FFH) when initiating a Program operation. A Byte-Program instruction applied to a pro- tected memory area will be ignored. Prior to any Write operation, the Write-Enable (WREN) instruction must be executed. CE# must remain active low for the duration of the Byte-Program instruction. The Byte- Program instruction is initiated by executing an 8-bit com- mand, 02H, followed by address bits [A23-A0]. Following the address, the data is input in order from MSB (bit 7) to LSB (bit 0). CE# must be driven high before the instruction is executed. The user may poll the Busy bit in the software status register or wait TBP for the completion of the internal self-timed Byte-Program operation. See Figure 8 for the Byte-Program sequence. FIGURE 8: Byte-Program Sequence 1328 F08.0 CE# SO SI SCK ADD. 012 34 5 6 7 8 ADD. ADD. DIN 02 HIGH IMPEDANCE 15 16 23 24 31 32 39 MSB LSB MODE 3 MODE 0 MSB |
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