PIC18F23K22-ESLASHML datasheet(261/496 Pages) MICROCHIP

261 / 496 page

 2010 Microchip Technology Inc.

Preliminary

DS41412C-page 261

PIC18(L)F2X/4XK22

SSPXADD: MSSPx ADDRESS AND BAUD RATE REGISTER (I2C MODE)

R/W-0

ADD<7:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

Master mode:

bit 7-0

ADD<7:0>: Baud Rate Clock Divider bits

SCLx pin clock period = ((ADD<7:0> + 1) *4)/FOSC

10-Bit Slave mode — Most Significant Address byte:

bit 7-3

Not used: Unused for Most Significant Address byte. Bit state of this register is a “don’t care”. Bit

pattern sent by master is fixed by I2C specification and must be equal to ‘11110’. However, those bits

are compared by hardware and are not affected by the value in this register.

bit 2-1

ADD<2:1>: Two Most Significant bits of 10-bit address

bit 0

Not used: Unused in this mode. Bit state is a “don’t care”.

10-Bit Slave mode — Least Significant Address byte:

bit 7-0

ADD<7:0>: Eight Least Significant bits of 10-bit address

7-Bit Slave mode:

bit 7-1

ADD<7:1>: 7-bit address

bit 0

Not used: Unused in this mode. Bit state is a “don’t care”.

PIC18F23K22-E/ML Datasheet(PDF) 261 Page - Microchip Technology