PIC18F23K22-ESLASHML datasheet(38/496 Pages) MICROCHIP

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PIC18(L)F2X/4XK22

DS41412C-page 38

Preliminary

 2010 Microchip Technology Inc.

2.5.2

LFINTOSC

The Low-Frequency Internal Oscillator (LFINTOSC) is

a 31.25 kHz internal clock source. The LFINTOSC is

not tunable, but is designed to be stable across temper-

ature and voltage. See Section 27.0 “Electrical Char-

acteristics”

for

the

LFINTOSC

accuracy

specifications.

The output of the LFINTOSC can be a clock source to

the primary clock or the INTOSC clock (see Figure 2-1).

The LFINTOSC is also the clock source for the Power-

up Timer (PWRT), Watchdog Timer (WDT) and Fail-Safe

Clock Monitor (FSCM).

2.5.3

FREQUENCY SELECT BITS (IRCF)

The HFINTOSC (16 MHz) and MFINTOSC (500 MHz)

outputs connect to a divide circuit that provides

frequencies of 16 MHz to 31.25 kHz. These divide

circuit

frequencies,

along

with

the

31.25 kHz

LFINTOSC output, are multiplexed to provide a single

INTOSC clock output (see Figure 2-1). The IRCF<2:0>

bits of the OSCCON register, the MFIOSEL bit of the

OSCCON2 register and the INTSRC bit of the

OSCTUNE register, select the output frequency of the

internal oscillators. One of eight frequencies can be

selected via software:

•16 MHz

•8 MHz

•4 MHz

•2 MHz

• 1 MHz (Default after Reset)

• 500 kHz (MFINTOSC or HFINTOSC)

• 250 kHz (MFINTOSC or HFINTOSC)

• 31 kHz (LFINTOSC, MFINTOSC or HFINTOSC)

2.5.4

INTOSC FREQUENCY DRIFT

The factory calibrates the internal oscillator block outputs

(HFINTOSC/MFINTOSC) for 16 MHz/500 kHz. However,

this frequency may drift as VDD or temperature changes.

It is possible to adjust the HFINTOSC/MFINTOSC fre-

quency by modifying the value of the TUN<5:0> bits in the

OSCTUNE register. This has no effect on the LFINTOSC

clock source frequency.

Tuning the HFINTOSC/MFINTOSC source requires

knowing when to make the adjustment, in which direc-

tion it should be made and, in some cases, how large a

change is needed. Three possible compensation tech-

niques are discussed in the following sections. However,

other techniques may be used.

2.5.4.1

Compensating with the EUSART

An adjustment may be required when the EUSART

begins to generate framing errors or receives data with

errors while in Asynchronous mode. Framing errors

indicate that the device clock frequency is too high; to

adjust for this, decrement the value in OSCTUNE to

reduce the clock frequency. On the other hand, errors

in data may suggest that the clock speed is too low; to

compensate, increment OSCTUNE to increase the

clock frequency.

2.5.4.2

Compensating with the Timers

This technique compares device clock speed to some

reference clock. Two timers may be used; one timer is

clocked by the peripheral clock, while the other is

clocked by a fixed reference source, such as the

Timer1 oscillator.

Both timers are cleared, but the timer clocked by the

reference generates interrupts. When an interrupt

occurs, the internally clocked timer is read and both

timers are cleared. If the internally clocked timer value

is greater than expected, then the internal oscillator

block is running too fast. To adjust for this, decrement

the OSCTUNE register.

2.5.4.3

Compensating with the CCP Module

in Capture Mode

A CCP module can use free running Timer1, Timer3 or

Timer5 clocked by the internal oscillator block and an

external event with a known period (i.e., AC power

frequency). The time of the first event is captured in the

CCPRxH:CCPRxL registers and is recorded for use later.

When the second event causes a capture, the time of the

first event is subtracted from the time of the second

event. Since the period of the external event is known,

the time difference between events can be calculated.

If the measured time is much greater than the calcu-

lated time, the internal oscillator block is running too

fast; to compensate, decrement the OSCTUNE register.

If the measured time is much less than the calculated

time, the internal oscillator block is running too slow; to

compensate, increment the OSCTUNE register.

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