PIC18F23K22-ESLASHML datasheet(313/496 Pages) MICROCHIP

313 / 496 page

 2010 Microchip Technology Inc.

Preliminary

DS41412C-page 313

PIC18(L)F2X/4XK22

18.8

Additional Comparator Features

There are four additional comparator features:

• Simultaneous read of comparator outputs

• Internal reference selection

• Hysteresis selection

• Output Synchronization

18.8.1

SIMULTANEOUS COMPARATOR

OUTPUT READ

The MC1OUT and MC2OUT bits of the CM2CON1

The ability to read both outputs simultaneously from a

single register eliminates the timing skew of reading

separate registers.

18.8.2

INTERNAL REFERENCE

SELECTION

There are two internal voltage references available to

the non-inverting input of each comparator. One of

these is the Fixed Voltage Reference (FVR) and the

other is the variable Digital-to-Analog Converter (DAC).

The CxRSEL bit of the CM2CON1 register determines

which of these references is routed to the Comparator

Voltage reference output (CXVREF). Further routing to

the comparator is accomplished by the CxR bit of the

CMxCON0 register. See Section 21.0 “Fixed Voltage

Reference (FVR)” and Figure 18-2 for more detail.

18.8.3

COMPARATOR HYSTERESIS

Each Comparator has a selectable hysteresis feature.

The hysteresis can be enabled by setting the CxHYS

bit of the CM2CON1 register. See Section 27.0 “Elec-

trical Characteristics” for more details.

18.8.4

SYNCHRONIZING COMPARATOR

OUTPUT TO TIMER1

The Comparator Cx output can be synchronized with

Timer1 by setting the CxSYNC bit of the CM2CON1

the falling edge of the Timer1 source clock. To prevent

a race condition when gating Timer1 clock with the

comparator output, Timer1 increments on the rising

edge of its clock source, and the falling edge latches

the comparator output. See the Comparator Block

Diagram (Figure 18-2) and the Timer1 Block Diagram

(Figure 12-1) for more information.

Note 1: Obtaining the status of C1OUT or C2OUT

by reading CM2CON1 does not affect the

comparator interrupt mismatch registers.

Note 1: The comparator synchronized output

should not be used to gate the external

Timer1

clock

when

the

Timer1

synchronizer is enabled.

2: The Timer1 prescale should be set to 1:1

when synchronizing the comparator

output as unexpected results may occur

with other prescale values.

PIC18F23K22-E/ML Datasheet(PDF) 313 Page - Microchip Technology

PIC18F23K22-E/ML Datasheet(HTML) 313 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL