PIC18F23K22-ESLASHML datasheet(357/496 Pages) MICROCHIP

357 / 496 page

 2010 Microchip Technology Inc.

Preliminary

DS41412C-page 357

PIC18(L)F2X/4XK22

CONFIG6H: CONFIGURATION REGISTER 6 HIGH

R/C-1

R-1

U-0

WRTD

WRTB

WRTC(1)

—

bit 7

bit 0

Legend:

R = Readable bit

U = Unimplemented bit, read as ‘0’

-n = Value when device is unprogrammed

C = Clearable only bit

bit 7

WRTD: Data EEPROM Write Protection bit

1 = Data EEPROM not write-protected

0 = Data EEPROM write-protected

bit 6

WRTB: Boot Block Write Protection bit

1 = Boot Block not write-protected

0 = Boot Block write-protected

bit 5

WRTC: Configuration Register Write Protection bit(1)

1 = Configuration registers not write-protected

0 = Configuration registers write-protected

bit 4-0

Unimplemented: Read as ‘0’

Note 1:

This bit is read-only in normal execution mode; it can be written only in Program mode.

U-0

R/C-1

—

EBTR3(1)

EBTR2(1)

EBTR1

EBTR0

bit 7

bit 0

Legend:

R = Readable bit

U = Unimplemented bit, read as ‘0’

-n = Value when device is unprogrammed

C = Clearable only bit

bit 7-4

Unimplemented: Read as ‘0’

bit 3

EBTR3: Table Read Protection bit(1)

1 = Block 3 not protected from table reads executed in other blocks

0 = Block 3 protected from table reads executed in other blocks

bit 2

EBTR2: Table Read Protection bit(1)

1 = Block 2 not protected from table reads executed in other blocks

0 = Block 2 protected from table reads executed in other blocks

bit 1

EBTR1: Table Read Protection bit

1 = Block 1 not protected from table reads executed in other blocks

0 = Block 1 protected from table reads executed in other blocks

bit 0

EBTR0: Table Read Protection bit

1 = Block 0 not protected from table reads executed in other blocks

0 = Block 0 protected from table reads executed in other blocks

Note 1:

Available on PIC18(L)FX5K22 and PIC18(L)FX6K22 devices.

PIC18F23K22-E/ML Datasheet(PDF) 357 Page - Microchip Technology

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