10

FN6434.2

December 22, 2008

Pinout

ISL97635

(24 LD QFN)

TOP VIEW

SMBCLK

SMBDAT

FPWM

PWMO

GND

PWMI/EN

PGND

PGND

OVP

IIN0

IIN1

IIN2

1

2

3

4

5

6

18

17

16

15

14

13

24

23

22

21

20

19

78

9

10

11

12

PIN

NAME

TYPE

DESCRIPTION

1

SMBCLK

I

SMBus serial clock input

2

SMBDAT

I/O

SMBus serial data input and output

3

FPWM

I

4

PWMO

I/O

PWMI buffered output. If one connects a capacitor between PWMO and GND, it forms a low pass filter

with an internal 40k

Ω resistor, which filters the PWMI signal for DPST operation when Reg 0x01 = 0x01.

If one applies a 0.2V to 1.2V DC input voltage, the output will be PWM with duty cycle proportional to the

DC input.

5

GND

S

Analog GND and LED power return

6

PWMI/EN

I

Dual Functions: Enable pin and PWM brightness control pin or DPST control input. DO NOT let

PWMI/EN floating. The device needs 4ms for initial power-up Enable, then this pin can be applied with

a PWM signal with off-time no longer than 28ms.

7

IIN7

I

Input 7 to current source, FB, and monitoring

8

IIN6

I

Input 6 to current source, FB, and monitoring

9

IIN5

I

Input 5 to current source, FB, and monitoring

10

IIN4

I

Input 4 to current source, FB, and monitoring

11

RSET

I

12

IIN3

I

Input 3 to current source, FB, and monitoring

13

IIN2

I

Input 2 to current source, FB, and monitoring

14

IIN1

I

Input 1 to current source, FB, and monitoring

15

IIN0

I

Input 0 to current source, FB, and monitoring

16

OVP

I

Overvoltage protection input

17, 18

PGND

S

Power ground (LX Power return)

19, 20

LX

I

Input to boost switch

21

FAULT

O

Fault disconnect switch

ISL97635