CDP1802AC3 datasheet(23/27 Pages) INTERSIL

23 / 27 page

FN1441.3

October 17, 2008

TABLE 5. CONDITIONS ON DATA BUS AND MEMORY ADDRESS LINES DURING ALL MACHINE STATES

STATE

SYMBOL

OPERATION

DATA

BUS

MEMORY

ADDRESS

MRD

MWR

LINES

NOTES

RESET

→ I, N, Q, X, P; 1 → lE

XXXX

Initialize, Not Programmer

Accessible

0000

→ R

XXXX

FETCH

MRP

→ l, N; RP + 1 → RP

MRP

lDL

IDLE

MR0

20, Fig. 6

01 - F

LDN

MRN

→ D

MRN

Fig. 6

10 - F

INC

RN + 1

→ RN

Float

Fig. 4

20 - F

DEC

RN - 1

→ RN

Float

Fig. 4

30 - F

Short Branch Taken: MRP

→ RP.0

Not Taken; RP + 1

→ RP

MRP

Fig. 6

40 - F

LDA

MRN

→ D; RN + 1 → RN

MRN

Fig. 6

50 - F

STR

→ MRN

Fig. 5

IRX

RX + 1

→ RX

MRX

Fig. 5

OUT 1

MRX

→ BUS; RX + 1 → RX

MRX

Fig. 9

OUT 2

2Fig. 9

OUT 3

3Fig. 9

OUT 4

4Fig. 9

OUT 5

5Fig. 9

OUT 6

6Fig. 9

OUT 7

7Fig. 9

INP 1

BUS

→ MRX, D

Data from

I/O Device

Fig. 8

INP 2

2Fig. 8

INP 3

3Fig. 8

INP 4

4Fig. 8

INP5

5Fig. 8

INP6

6Fig. 8

INP7

7Fig. 8

RET

MRX

→ (X, P); RX + 1 → RX;

→ lE

MRX

Fig. 6

DlS

MRX

→ (X, P); RX + 1 → RX;

→ lE

MRX

Fig. 6

LDXA

MRX

→ D; RX + 1 → RX

MRX

Fig. 6

STXD

→ MRX; RX - 1 → RX

Fig. 5

ADC

MRX + D + DF

→ DF, D

MRX

Fig. 6

SDB

MRX - D - DFN

→ DF, D

MRX

Fig. 6

SHRC

LSB(D)

→ DF; DF → MSB(D)

Float

Fig. 4

SMB

D - MRX - DFN

→ DF, D

MRX

Fig. 6

SAV

→ MRX

Fig. 5

CDP1802AC/3

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