MB90F463APMC datasheet(39/88 Pages) FUJITSU

39 / 88 page

MB90460/465 Series

DS07-13714-2E

Block Diagram

TMRD0*1

<TMRD1>

Reload signal

Wait signal

Count clock generation

circuit

Machine

clock

TMR0*1

<TMR1>

P15/TIN0*1

CLK

Gate

input

Clear

Internal

clock

Select

signal

CLK

Invert

Output control circuit

To UART0 and

UART1 *1

<To the A/D

converter>

Interrupt request signal

#30 (1EH)*2

<#32 (20H)>

P16/TO0*1

External clock

Function selection

Timer control status register (TMCSR0)*1 <TMCSR1>

⎯⎯

⎯

⎯ CSL1 CSL0 MOD2

F2MC-16LX Bus

16-bit reload register

16-bit timer register

Prescaler

Input

control

circuit

Valid

clock

judgment

circuit

Clock

selector

Output signal

generation

circuit

Operation

control

circuit

Reload

control circuit

MOD1MOD0 OUTE OUTL RELD

INTE

CNTE TRG

*1 : This register includes channel 0 and channel 1. The register enclosed in

< and > indicates the

channel 1 register.

*2 : Interrupt number

MB90F463APMC Datasheet(PDF) 39 Page - fujitsu semiconductor

MB90F463APMC Datasheet(HTML) 39 Page - fujitsu semiconductor

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