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MB90T552APMC Datasheet(PDF) 49 Page - fujitsu semiconductor |
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MB90T552APMC Datasheet(HTML) 49 Page - fujitsu semiconductor |
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49 / 64 page  MB90550A/550B Series DS07-13706-6E 49 5. A/D Converter (1) Electrical Characteristics (4.5 V ≤ AVRH − AVRL, VCC = AVCC = 5.0 V±10%, VSS = AVSS = 0.0 V, TA = −40 °C to +85 °C) *1: When FCP = 8 MHz, tCMP = 176 × tCP. When FCP = 16 MHz, tCMP = 352 × tCP. *2: Equivalent to the time for conversion per channel if “tSMP = 64 × tCP” or “tCMP = 352 × tCP” is selected when FCP = 16 MHz. *3: Specifies the power-supply current (Vcc = AVcc = AVRH = 5.0 V) when the A/D converter is inactive and the CPU has been stopped. Notes: • The error becomes larger relatively as |AVRH-AVRL| becomes smaller. • Use the output impedance rS of the external circuit for analog input under the following condition: External circuit output impedance rS = 10 k Ω Max. • If the output impedance of the external circuit is too high, the analog voltage sampling time may be insufficient. • If you insert a DC-blocking capacitor between the external circuit and the input pin, select a capacitance that is about several thousands times the sampling capacitance CSH in the chip to suppress the effect of capacity potential division with CSH. Parameter Symbol Pin name Value Unit Remarks Min Typ Max Resolution — — — 10 — bit Total error — — — — ±5.0 LSB Non-linearity error — — — — ±2.5 LSB Differential linearity error — — — — ±1.9 LSB Zero transition voltage VOT AN0 to AN7 AVRL − 3.5LSB AVRL + 0.5LSB AVRL + 4.5LSB V 1LSB= (AVRH −AVRL) /1024 Full-scale transition voltage VFST AN0 to AN7 AVRH − 6.5LSB AVRH − 1.5LSB AVRH + 1.5LSB V Sampling period tSMP — 64 — 4096 tCP Compare time tCMP —22 — — µs *1 A/D Conversion time tCNV —26.3 — — µs *2 Analog port input current IAIN AN0 to AN7 — — 10 µA Analog input voltage VAIN AN0 to AN7 AVRL — AVRH V Reference voltage — AVRH AVRL + 4.5 — AVCC V — AVRL 0 — AVRH − 4.5 V Power supply current IA AVCC —3.5 7.0 mA IAH —— 5 µA *3 Reference voltage supply current IR AVRH — 300 500 µA IRH —— 5 µA *3 Offset between channels — AN0 to AN7 — — 4 LSB |
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