M95256-CS3TGSLASHK datasheet(23/48 Pages) STMICROELECTRONICS

23 / 48 page

M95256-DR, M95256, M95256-W, M95256-R

Instructions

Doc ID 12276 Rev 11

23/48

5.7

Read Identification Page (available only in M95256-DR

devices)

The Identification Page (64 bytes) is an additional page which can be written and (later)

permanently locked in Read-only mode.

Reading this page is achieved with the Read Identification Page instruction (see Table 4).

The Chip Select signal (S) is first driven low, the bits of the instruction byte and address

bytes are then shifted in, on Serial Data input (D). Address bit A10 must be 0, address bits

[A17:A11] and [A9:A8] are Don't Care, and the data byte pointed to by [A7:A0] is shifted out

on Serial Data output (Q). If Chip Select (S) continues to be driven low, the internal address

The number of bytes to read in the ID page must not exceed the page boundary (e.g.: when

reading the ID page from location 24d, the number of bytes should be less than or equal to

40d, as the ID page boundary is 64 bytes).

The read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip

Select (S) signal can occur at any time during the cycle. The first byte addressed can be any

byte within any page.

The instruction is not accepted, and is not executed, if a write cycle is currently in progress.

Figure 13.

Read Identification Page sequence

M95256-CS3TG/K Datasheet(PDF) 23 Page - STMicroelectronics