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MHVIC2114R2 Datasheet(PDF) 1 Page - Freescale Semiconductor, Inc |
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MHVIC2114R2 Datasheet(HTML) 1 Page - Freescale Semiconductor, Inc |
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1 / 9 page ![]() Replaced by MHVIC2114NR2. There are no form, fit or function changes with this part replacement. N suffix indicates RoHS compliant part. MHVIC2114R2 1 RF Device Data Freescale Semiconductor RF LDMOS Wideband Integrated Power Amplifier The MHVIC2114R2 wideband integrated circuit is designed for base station applications. It uses Freescale’s newest High Voltage (26 to 28 Volts) LDMOS IC technology and integrates a multi-stage structure. Its wideband On-Chip matching design makes it usable from 1600 to 2600 MHz. The linearity performances cover all modulation formats for cellular applications: CDMA and W -CDMA. The device is in a PFP - 16 flat pack package that provides excellent thermal performance through a solderable backside contact. Final Application • Typical Two-Tone Performance: VDD = 27 Volts, IDQ1 = 95 mA, IDQ2 = 204 mA, IDQ3 = 111 mA, Pout = 15 Watts PEP, Full Frequency Band Power Gain — 32 dB IMD — -30 dBc Driver Application • Typical Single-Channel W-CDMA Performance: VDD = 27 Volts, IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA, Pout = 23 dBm, 2110-2170 MHz, 3GPP Test Model 1, Measured in a 3.84 MHz BW @ 5 MHz Offset, 64 DTCH, Peak/Avg. = 8.5 dB @ 0.01% Probability on CCDF. Power Gain — 32 dB ACPR — -58 dBc • P1dB = 14 Watts, Gain Flatness = 0.2 dB from 2110 to 2170 MHz • Capable of Handling 3:1 VSWR, @ 27 Vdc, 2140 MHz, 15 Watts CW Output Power • Characterized with Series Equivalent Large-Signal Impedance Parameters and Common Source Scattering Parameters • On-Chip Matching (50 Ohm Input, DC Blocked, >5 Ohm Output) • Integrated Temperature Compensation with Enable/Disable Function • Integrated ESD Protection • In Tape and Reel. R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel. 16 15 14 13 12 11 10 1 2 3 4 5 6 7 8 (Top View) 9 N.C. VGS3 VGS2 VGS1 RFin VDS1 VDS2 N.C. VDS3/RFout VDS3/RFout VDS3/RFout VDS3/RFout VDS3/RFout VDS3/RFout N.C. RFin Quiescent Current Temperature Compensation 3 Stages IC VDS1 RFin IC VGS3 VDS3/RFout VGS2 VGS1 VDS2 Note: Exposed backside flag is source terminal for transistors. Figure 1. Block Diagram Figure 2. Pin Connections NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. Document Number: MHVIC2114R2 Rev. 4, 8/2006 Freescale Semiconductor Technical Data MHVIC2114R2 CASE 978-03 PFP -16 2100 MHz, 27 V, 23 dBm SINGLE W-CDMA RF LDMOS WIDEBAND INTEGRATED POWER AMPLIFIER 16 1 © Freescale Semiconductor, Inc., 2006. All rights reserved. |
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