CMLDM8120

CMLDM8120G*

SURFACE MOUNT

P-CHANNEL

ENHANCEMENT-MODE

SILICON MOSFET

SOT-563 CASE - MECHANICAL OUTLINE

PIN CONFIGURATION

ELECTRICAL CHARACTERISTICS - Continued: (TA=25°C unless otherwise noted)

SYMBOL TEST CONDITIONS

MIN

TYP

MAX

UNITS

gFS

VDS=10V, ID=0.81A

2.0

S

Crss

VDS=16V, VGS=0, f=1.0MHz

80

pF

Ciss

VDS=16V, VGS=0, f=1.0MHz

200

pF

Coss

VDS=16V, VGS=0, f=1.0MHz

60

pF

ton

VDD=10V, VGS=4.5V, ID=0.95A, RG=6Ω

20

ns

toff

VDD=10V, VGS=4.5V, ID=0.95A, RG=6Ω

25

ns

LEAD CODE:

1) Drain

2) Drain

3) Gate

4) Source

5) Drain

6) Drain

MARKING CODES:

CMLDM8120: C81

CMLDM8120G*: C8G

* Device is Halogen Free by design

www.centr a lsemi.com

R3 (18-January 2010)