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CY7C68053 Datasheet(PDF) 21 Page - Cypress Semiconductor |
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CY7C68053 Datasheet(HTML) 21 Page - Cypress Semiconductor |
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21 / 42 page  CY7C68053 Document # 001-06120 Rev *J Page 21 of 42 Reserved E6D2 1 EP2GPIFFLGSEL[10] Endpoint 2 GPIF flag select 0 0 0 0 0 0 FS1 FS0 00000000 RW E6D3 1 EP2GPIFPFSTOP Endpoint 2 GPIF stop trans- action on program flag 0 0 0 0 0 0 0 FIFO2FLAG 00000000 RW E6D4 1 EP2GPIFTRIG[10] Endpoint 2 GPIF trigger x x x x x x x x xxxxxxxx W 3 Reserved Reserved Reserved E6DA 1 EP4GPIFFLGSEL[10] Endpoint 4 GPIF flag select 0 0 0 0 0 0 FS1 FS0 00000000 RW E6DB 1 EP4GPIFPFSTOP Endpoint 4 GPIF stop trans- action on GPIF flag 0 0 0 0 0 0 0 FIFO4FLAG 00000000 RW E6DC 1 EP4GPIFTRIG[10] Endpoint 4 GPIF trigger x x x x x x x x xxxxxxxx W 3 Reserved Reserved Reserved E6E2 1 EP6GPIFFLGSEL[10] Endpoint 6 GPIF flag select 0 0 0 0 0 0 FS1 FS0 00000000 RW E6E3 1 EP6GPIFPFSTOP Endpoint 6 GPIF stop trans- action on program flag 0 0 0 0 0 0 0 FIFO6FLAG 00000000 RW E6E4 1 EP6GPIFTRIG[10] Endpoint 6 GPIF trigger x x x x x x x x xxxxxxxx W 3 Reserved Reserved Reserved E6EA 1 EP8GPIFFLGSEL[10] Endpoint 8 GPIF flag select 0 0 0 0 0 0 FS1 FS0 00000000 RW E6EB 1 EP8GPIFPFSTOP Endpoint 8 GPIF stop trans- action on program flag 0 0 0 0 0 0 0 FIFO8FLAG 00000000 RW E6EC 1 EP8GPIFTRIG[10] Endpoint 8 GPIF trigger x x x x x x x x xxxxxxxx W 3 Reserved E6F0 1 XGPIFSGLDATH GPIF Data H (16-bit mode only) D15 D14 D13 D12 D11 D10 D9 D8 xxxxxxxx RW E6F1 1 XGPIFSGLDATLX Read/Write GPIF Data L and trigger transaction D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW E6F2 1 XGPIFSGLDATL- NOX Read GPIF Data L, no trans- action trigger D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx R E6F3 1 GPIFREADYCFG Internal RDY, sync/async, RDY pin states INTRDY SAS TCXRDY5 0 0 0 0 0 00000000 bbbrrrrr E6F4 1 GPIFREADYSTAT GPIF ready status 0 0 0 0 0 0 RDY1 RDY0 00xxxxxx R E6F5 1 GPIFABORT Abort GPIF waveforms x x x x x x x x xxxxxxxx W E6F6 2 Reserved ENDPOINT BUFFERS E740 64 EP0BUF EP0-IN/-OUT buffer D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW E780 64 EP10UTBUF EP1-OUT buffer D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW E7C0 64 EP1INBUF EP1-IN buffer D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW E800 2048 Reserved RW F000 1024 EP2FIFOBUF 512/1024-byte EP 2/Slave FIFO buffer (IN or OUT) D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW F400 512 EP4FIFOBUF 512 byte EP 4/Slave FIFO buffer (IN or OUT) D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW F600 512 Reserved F800 1024 EP6FIFOBUF 512/1024-byte EP 6/Slave FIFO buffer (IN or OUT) D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW FC00 512 EP8FIFOBUF 512 byte EP 8/Slave FIFO buffer (IN or OUT) D7 D6 D5 D4 D3 D2 D1 D0 xxxxxxxx RW FE00 512 Reserved xxxx I²C Configuration Byte 0 DISCON 0 0 0 0 0 400KHZ xxxxxxxx [12] n/a Table 8. FX2LP18 Register Summary (continued) Hex Size Name Description b7 b6 b5 b4 b3 b2 b1 b0 Default Access Note 12. If no EEPROM is detected by the SIE then the default is 00000000. [+] Feedback |
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