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DSPIC30F2010 Datasheet(PDF) 195 Page - Microchip Technology |
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DSPIC30F2010 Datasheet(HTML) 195 Page - Microchip Technology |
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195 / 202 page  © 2011 Microchip Technology Inc. DS70118J-page 195 dsPIC30F2010 Instruction Addressing Modes............................................. 31 File Register Instructions ............................................ 31 Fundamental Modes Supported.................................. 31 MAC Instructions......................................................... 32 MCU Instructions ........................................................ 32 Move and Accumulator Instructions............................ 32 Other Instructions........................................................ 32 Instruction Set ................................................................... 135 Inter-Integrated Circuit. See I2C Internal Clock Timing Examples ....................................... 159 Internet Address................................................................ 199 Interrupt Controller Register Map............................................................... 42 Interrupt Priority .................................................................. 38 Traps........................................................................... 39 Interrupt Sequence ............................................................. 41 Interrupt Stack Frame ................................................. 41 Interrupts ............................................................................. 37 L Load Conditions ................................................................ 156 M Memory Organization.......................................................... 19 Microchip Internet Web Site .............................................. 199 Modulo Addressing ............................................................. 33 Applicability ................................................................. 35 Operation Example ..................................................... 34 Start and End Address................................................ 33 W Address Register Selection .................................... 33 Motor Control PWM Module................................................ 81 Fault Timing Characteristics ..................................... 168 Timing Characteristics .............................................. 168 Timing Requirements................................................ 168 MPLAB ASM30 Assembler, Linker, Librarian ................... 144 MPLAB Integrated Development Environment Software .. 143 MPLAB PM3 Device Programmer .................................... 146 MPLAB REAL ICE In-Circuit Emulator System................. 145 MPLINK Object Linker/MPLIB Object Librarian ................ 144 O OC/PWM Module Timing Characteristics.......................... 167 Operating Current (IDD)..................................................... 150 Operating MIPS vs Voltage dsPIC30F2010 .......................................................... 148 Oscillator Configurations Fast RC (FRC) .................................................. 125 Low Power RC (LPRC) ..................................... 125 Phase Locked Loop (PLL) ................................ 125 Oscillator Configurations ................................................... 124 Fail-Safe Clock Monitor............................................. 126 Initial Clock Source Selection ................................... 124 LP Oscillator Control ................................................. 125 Start-up Timer (OST) ................................................ 124 Oscillator Operating Modes Table .................................... 122 Oscillator Selection ........................................................... 121 Oscillator Start-up Timer Timing Characteristics .............................................. 161 Timing Requirements................................................ 161 Output Compare Interrupts ................................................. 73 Output Compare Mode Register Map............................................................... 74 Output Compare Module..................................................... 71 Timing Characteristics .............................................. 166 Timing Requirements................................................ 166 Output Compare Operation During CPU Idle Mode ........... 73 Output Compare Sleep Mode Operation ............................ 73 P Packaging Information ...................................................... 185 Marking..................................................................... 185 Pinout Descriptions............................................................... 9 PLL Clock Timing Specifications ...................................... 158 POR. See Power-on Reset Port Register Map............................................................... 55 Port Write/Read Example ................................................... 54 PORTB Register Map .............................................................. 55 PORTC Register Map .............................................................. 55 PORTD Register Map .............................................................. 55 PORTE Register Map .............................................................. 55 PORTF Register Map .............................................................. 55 Position Measurement Mode .............................................. 77 Power-Down Current (IPD)................................................ 152 Power-on Reset (POR)..................................................... 121 Oscillator Start-up Timer (OST) ................................ 121 Power-up Timer (PWRT) .......................................... 121 Power-Saving Modes........................................................ 131 Idle............................................................................ 132 Sleep ........................................................................ 131 Power-Saving Modes (Sleep and Idle) ............................. 121 Power-up Timer Timing Characteristics .............................................. 161 Timing Requirements ............................................... 161 Product Identification System ........................................... 201 Program Address Space..................................................... 19 Construction ............................................................... 20 Data Access from Program Memory Using Table Instructions ............................................... 21 Data Access From, Address Generation .................... 20 Memory Map............................................................... 19 Table Instructions TBLRDH ............................................................. 21 TBLRDL.............................................................. 21 TBLWTH............................................................. 21 TBLWTL ............................................................. 21 Program and EEPROM Characteristics............................ 155 Program Counter ................................................................ 12 Program Data Table Access............................................... 22 Program Space Visibility Window into Program Space Operation ..................... 23 Programmable .................................................................. 121 Programmable Digital Noise Filters .................................... 77 Programmer’s Model .......................................................... 12 Diagram ...................................................................... 13 Programming Operations.................................................... 45 Algorithm for Program Flash....................................... 45 Erasing a Row of Program Memory ........................... 45 Initiating the Programming Sequence ........................ 46 Loading Write Latches................................................ 46 Programming, Device Instructions.................................... 135 Protection Against Accidental Writes to OSCCON ........... 126 PWM Register Map .............................................................. 90 PWM Duty Cycle Comparison Units ................................... 85 Duty Cycle Register Buffers ....................................... 86 PWM FLTA Pins ................................................................. 88 |
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